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author | wdenk <wdenk> | 2003-06-28 17:24:46 +0000 |
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committer | wdenk <wdenk> | 2003-06-28 17:24:46 +0000 |
commit | d1cbe85b084ce543ba0b09def03a1b20940e6c03 (patch) | |
tree | 1cbfceb46952e902208d58595d163143d6038e8a /include/mpc8xx.h | |
parent | 8bde7f776c77b343aca29b8c7b58464d915ac245 (diff) | |
download | u-boot-d1cbe85b084ce543ba0b09def03a1b20940e6c03.tar.gz |
Merge from "stable branch", tag LABEL_2003_06_28_1800-stable:
- Allow to call sysmon function interactively
- PIC on LWMON board needs delay after power-on
- Add missing RSR definitions for MPC8xx
- Improve log buffer handling: guarantee clean reset after power-on
- Add support for EXBITGEN board
- Add support for SL8245 board
Diffstat (limited to 'include/mpc8xx.h')
-rw-r--r-- | include/mpc8xx.h | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/include/mpc8xx.h b/include/mpc8xx.h index ef6d3f7dd9..1a65f10ca2 100644 --- a/include/mpc8xx.h +++ b/include/mpc8xx.h @@ -118,6 +118,20 @@ #endif /*----------------------------------------------------------------------- + * RSR - Reset Status Register 5-4 + */ +#define RSR_JTRS 0x01000000 /* JTAG Reset Status */ +#define RSR_DBSRS 0x02000000 /* Debug Port Soft Reset Status */ +#define RSR_DBHRS 0x04000000 /* Debug Port Hard Reset Status */ +#define RSR_CSRS 0x08000000 /* Check Stop Reset Status */ +#define RSR_SWRS 0x10000000 /* Software Watchdog Reset Status*/ +#define RSR_LLRS 0x20000000 /* Loss-of-Lock Reset Status */ +#define RSR_ESRS 0x40000000 /* External Soft Reset Status */ +#define RSR_EHRS 0x80000000 /* External Hard Reset Status */ + +#define RSR_ALLBITS (RSR_JTRS|RSR_DBSRS|RSR_DBHRS|RSR_CSRS|RSR_SWRS|RSR_LLRS|RSR_ESRS|RSR_EHRS) + +/*----------------------------------------------------------------------- * PLPRCR - PLL, Low-Power, and Reset Control Register 15-30 */ #define PLPRCR_MF_MSK 0xFFF00000 /* Multiplication factor bits */ |