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| author | Shengzhou Liu <Shengzhou.Liu@freescale.com> | 2015-11-20 15:52:04 +0800 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2015-12-13 18:27:28 -0800 |
| commit | a46b1852de967f8a7de26e0b46e864c794a18c16 (patch) | |
| tree | f07b01daa4c6b1b63fec278279457bc97dfbdafc /include/fsl_errata.h | |
| parent | a07bdad749ea080e009a82ba40e791dc7361ab54 (diff) | |
| download | u-boot-a46b1852de967f8a7de26e0b46e864c794a18c16.tar.gz | |
fsl/ddr: updated ddr errata-A008378 for arm and power SoCs
DDR errata-A008378 applies to LS1021-20-22A-R1.0, T1023-R1.0,
T1024-R1.0, T1040-42-20-22-R1.0/R1.1, it has been fixed on
LS102x Rev2.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'include/fsl_errata.h')
| -rw-r--r-- | include/fsl_errata.h | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/include/fsl_errata.h b/include/fsl_errata.h index aebe3d2925..8441f91029 100644 --- a/include/fsl_errata.h +++ b/include/fsl_errata.h @@ -58,4 +58,35 @@ static inline bool has_erratum_a007186(void) } #endif +#ifdef CONFIG_SYS_FSL_ERRATUM_A008378 +static inline bool has_erratum_a008378(void) +{ + u32 svr = get_svr(); + u32 soc = SVR_SOC_VER(svr); + + + switch (soc) { +#ifdef CONFIG_LS102XA + case SOC_VER_LS1020: + case SOC_VER_LS1021: + case SOC_VER_LS1022: + case SOC_VER_SLS1020: + return IS_SVR_REV(svr, 1, 0); +#endif +#ifdef CONFIG_PPC + case SVR_T1023: + case SVR_T1024: + return IS_SVR_REV(svr, 1, 0); + case SVR_T1020: + case SVR_T1022: + case SVR_T1040: + case SVR_T1042: + return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 1, 1); +#endif + default: + return false; + } +} +#endif + #endif /* _FSL_ERRATA_H */ |