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| author | York Sun <yorksun@freescale.com> | 2014-03-27 17:54:47 -0700 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2014-04-22 17:58:48 -0700 |
| commit | 34e026f9b1eb3bcffb38e7787c2e6eac0e88ba85 (patch) | |
| tree | f155ebdbac95a5ef637e7796ad22935029a56ce6 /include/fsl_ddrc_version.h | |
| parent | 8d451a7129ee6820cc126c77f0f0a175a2cb2e8d (diff) | |
| download | u-boot-34e026f9b1eb3bcffb38e7787c2e6eac0e88ba85.tar.gz | |
driver/ddr/fsl: Add DDR4 support to Freescale DDR driver
Mostly reusing DDR3 driver, this patch adds DDR4 SPD handling, register
calculation and programming.
Signed-off-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'include/fsl_ddrc_version.h')
| -rw-r--r-- | include/fsl_ddrc_version.h | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/include/fsl_ddrc_version.h b/include/fsl_ddrc_version.h new file mode 100644 index 0000000000..60ba98bf81 --- /dev/null +++ b/include/fsl_ddrc_version.h @@ -0,0 +1,18 @@ +/* + * Copyright 2014 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __FSL_DDRC_VER_H +#define __FSL_DDRC_VER_H + +/* + * Only the versions with distinct features or registers are listed here. + */ +#define FSL_DDR_VER_4_4 44 +#define FSL_DDR_VER_4_6 46 +#define FSL_DDR_VER_4_7 47 +#define FSL_DDR_VER_5_0 50 + +#endif /* __FSL_DDRC_VER_H */ |