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author | York Sun <yorksun@freescale.com> | 2015-03-20 19:28:23 -0700 |
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committer | York Sun <yorksun@freescale.com> | 2015-04-23 08:55:58 -0700 |
commit | 7288c2c2b0d4ea2475424ef9d00227a4b608234d (patch) | |
tree | d364d1acf79fa9dde7b931553cde665ec8372e94 /include/fsl_ddr_sdram.h | |
parent | 9cc2c4713a822cccaa1c5872720a23675045dd42 (diff) | |
download | u-boot-7288c2c2b0d4ea2475424ef9d00227a4b608234d.tar.gz |
armv8/ls2085aqds: Add support of LS2085AQDS platform
The LS2085AQDS is an evaluatoin platform that supports the LS2085A
family SoCs. This patch add basic support of the platform.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Diffstat (limited to 'include/fsl_ddr_sdram.h')
-rw-r--r-- | include/fsl_ddr_sdram.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/fsl_ddr_sdram.h b/include/fsl_ddr_sdram.h index 6358b6f3a2..e5b6e03c8f 100644 --- a/include/fsl_ddr_sdram.h +++ b/include/fsl_ddr_sdram.h @@ -167,6 +167,7 @@ typedef struct ddr4_spd_eeprom_s generic_spd_eeprom_t; #define DDR_CDR2_ODT(x) (x & DDR_CDR2_ODT_MASK) #define DDR_CDR2_VREF_OVRD(x) (0x00008080 | ((((x) - 37) & 0x3F) << 8)) #define DDR_CDR2_VREF_TRAIN_EN 0x00000080 +#define DDR_CDR2_VREF_RANGE_2 0x00000040 #if (defined(CONFIG_SYS_FSL_DDR_VER) && \ (CONFIG_SYS_FSL_DDR_VER >= FSL_DDR_VER_4_7)) |