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author | Shengzhou Liu <Shengzhou.Liu@nxp.com> | 2016-04-07 16:22:21 +0800 |
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committer | York Sun <york.sun@nxp.com> | 2016-05-17 09:26:19 -0700 |
commit | 074596c0b5f4e9a3642a3159a9fc7f8b8064c18a (patch) | |
tree | 645933dc5c430f57d2c27ce98af98329d02852e0 /include/fsl_ddr_sdram.h | |
parent | aeaec0e682f45b9e0c62c522fafea353931f73ed (diff) | |
download | u-boot-074596c0b5f4e9a3642a3159a9fc7f8b8064c18a.tar.gz |
armv8/ls1043: Add workaround for DDR erratum A-008850
Barrier transactions from CCI400 need to be disabled till
the DDR is configured, otherwise it may lead to system hang.
The patch adds workaround to fix the erratum.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'include/fsl_ddr_sdram.h')
-rw-r--r-- | include/fsl_ddr_sdram.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/include/fsl_ddr_sdram.h b/include/fsl_ddr_sdram.h index cf316a4665..44ae7fbb9c 100644 --- a/include/fsl_ddr_sdram.h +++ b/include/fsl_ddr_sdram.h @@ -146,6 +146,10 @@ typedef struct ddr4_spd_eeprom_s generic_spd_eeprom_t; #define WR_DATA_DELAY_SHIFT 10 #endif +/* DDR_EOR register */ +#define DDR_EOR_RD_REOD_DIS 0x07000000 +#define DDR_EOR_WD_REOD_DIS 0x00100000 + /* DDR_MD_CNTL */ #define MD_CNTL_MD_EN 0x80000000 #define MD_CNTL_CS_SEL_CS0 0x00000000 |