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| author | York Sun <yorksun@freescale.com> | 2015-07-23 14:04:48 -0700 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2015-08-03 12:06:38 -0700 |
| commit | 56848428a88f89420ae7acc04bb5805e70c430a3 (patch) | |
| tree | dacf689050c9dacae1c7ad899704298f6a7626c3 /include/fsl_ddr.h | |
| parent | 14d5547cf158c18bc340f01424e011b0802a6bb0 (diff) | |
| download | u-boot-56848428a88f89420ae7acc04bb5805e70c430a3.tar.gz | |
drivers/ddr/fsl: Adjust bstopre value
By default the bstopre value has been set to 0x100, used to be 1/4
value of refint. Modern DDR has increased the refresh time. Adjust
to 1/4 of refresh interval dynamically. Individual board can still
override this value in board ddr file, or to use auto-precharge.
Signed-off-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'include/fsl_ddr.h')
| -rw-r--r-- | include/fsl_ddr.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/fsl_ddr.h b/include/fsl_ddr.h index 728503b62c..1ac092bb92 100644 --- a/include/fsl_ddr.h +++ b/include/fsl_ddr.h @@ -103,7 +103,7 @@ unsigned int compute_lowest_common_dimm_parameters( const dimm_params_t *dimm_params, common_timing_params_t *outpdimm, unsigned int number_of_dimms); -unsigned int populate_memctl_options(int all_dimms_registered, +unsigned int populate_memctl_options(const common_timing_params_t *common_dimm, memctl_options_t *popts, dimm_params_t *pdimm, unsigned int ctrl_num); |