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| author | Gabriel Huau <contact@huau-gabriel.fr> | 2015-05-25 22:27:37 -0700 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2015-06-04 03:32:08 -0600 |
| commit | 5318f18d2c002f505054b90bb95ba7c53532eedf (patch) | |
| tree | c9e25f8c9fc57dbeba19b617f421b6f1ba7ca8d1 /include/fdtdec.h | |
| parent | afbbd413a3ef8a45155fcd083814ba645b09fcc7 (diff) | |
| download | u-boot-5318f18d2c002f505054b90bb95ba7c53532eedf.tar.gz | |
x86: gpio: add pinctrl support from the device tree
Every pin can be configured now from the device tree. A dt-bindings
has been added to describe the different property available.
Change-Id: I1668886062655f83700d0e7bbbe3ad09b19ee975
Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr>
Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'include/fdtdec.h')
| -rw-r--r-- | include/fdtdec.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/fdtdec.h b/include/fdtdec.h index 64c7fa1955..4fb8a2a1ba 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -176,6 +176,7 @@ enum fdt_compat_id { COMPAT_AMS_AS3722, /* AMS AS3722 PMIC */ COMPAT_INTEL_ICH_SPI, /* Intel ICH7/9 SPI controller */ COMPAT_INTEL_QRK_MRC, /* Intel Quark MRC */ + COMPAT_INTEL_X86_PINCTRL, /* Intel ICH7/9 pin control */ COMPAT_SOCIONEXT_XHCI, /* Socionext UniPhier xHCI */ COMPAT_INTEL_PCH, /* Intel PCH */ COMPAT_INTEL_IRQ_ROUTER, /* Intel Interrupt Router */ |