Merge tag 'mips-pull-2019-10-25' of git://git.denx.de/u-boot-mipsWIP/25Oct2019

- bmips: add BCRM NAND support for BCM6368, BCM6328, BCM6362 and BCM63268 SoCs
- bmips: various small fixes
- mtmips: add new drivers for clock, reset-controller and pinctrl
- mtmips: add support for high speed UART
- mtmips: update/enhance drivers for SPI and ethernet
- mtmips: add support for MMC

5 files changed, 76 insertions, 3 deletions

diff --git a/include/dt-bindings/clock/bcm6362-clock.h b/include/dt-bindings/clock/bcm6362-clock.h
index fed04e6b5f..d3770c5049 100644
--- a/include/dt-bindings/clock/bcm6362-clock.h
+++ b/include/dt-bindings/clock/bcm6362-clock.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
- * Copyright (C) 2018 Álvaro Fernández Rojas <noltari@gmail.com>
+ * Copyright (C) 2018 Álvaro Fernández Rojas <noltari@gmail.com>
  *
  * Derived from linux/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
  */
diff --git a/include/dt-bindings/clock/mt7628-clk.h b/include/dt-bindings/clock/mt7628-clk.h
new file mode 100644
index 0000000000..b5866fdc0e
--- /dev/null
+++ b/include/dt-bindings/clock/mt7628-clk.h
@@ -0,0 +1,37 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2019 MediaTek Inc.
+ *
+ * Author:  Weijie Gao <weijie.gao@mediatek.com>
+ */
+
+#ifndef _DT_BINDINGS_MT7628_CLK_H_
+#define _DT_BINDINGS_MT7628_CLK_H_
+
+/* Base clocks */
+#define CLK_SYS				34
+#define CLK_CPU				33
+#define CLK_XTAL			32
+
+/* Peripheral clocks */
+#define CLK_PWM				31
+#define CLK_SDXC			30
+#define CLK_CRYPTO			29
+#define CLK_MIPS_CNT			28
+#define CLK_PCIE			26
+#define CLK_UPHY			25
+#define CLK_ETH				23
+#define CLK_UART2			20
+#define CLK_UART1			19
+#define CLK_SPI				18
+#define CLK_I2S				17
+#define CLK_I2C				16
+#define CLK_GDMA			14
+#define CLK_PIO				13
+#define CLK_UART0			12
+#define CLK_PCM				11
+#define CLK_MC				10
+#define CLK_INTC			9
+#define CLK_TIMER			8
+
+#endif /* _DT_BINDINGS_MT7628_CLK_H_ */
diff --git a/include/dt-bindings/power-domain/bcm6362-power-domain.h b/include/dt-bindings/power-domain/bcm6362-power-domain.h
index ddc123ea88..1a708a9ad2 100644
--- a/include/dt-bindings/power-domain/bcm6362-power-domain.h
+++ b/include/dt-bindings/power-domain/bcm6362-power-domain.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
- * Copyright (C) 2018 Álvaro Fernández Rojas <noltari@gmail.com>
+ * Copyright (C) 2018 Álvaro Fernández Rojas <noltari@gmail.com>
  */
 
 #ifndef __DT_BINDINGS_POWER_DOMAIN_BCM6362_H
diff --git a/include/dt-bindings/reset/bcm6362-reset.h b/include/dt-bindings/reset/bcm6362-reset.h
index 6e257ce78f..8202e49919 100644
--- a/include/dt-bindings/reset/bcm6362-reset.h
+++ b/include/dt-bindings/reset/bcm6362-reset.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
- * Copyright (C) 2018 Álvaro Fernández Rojas <noltari@gmail.com>
+ * Copyright (C) 2018 Álvaro Fernández Rojas <noltari@gmail.com>
  *
  * Derived from linux/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
  */
diff --git a/include/dt-bindings/reset/mt7628-reset.h b/include/dt-bindings/reset/mt7628-reset.h
new file mode 100644
index 0000000000..2a674c1ea7
--- /dev/null
+++ b/include/dt-bindings/reset/mt7628-reset.h
@@ -0,0 +1,36 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2019 MediaTek Inc.
+ *
+ * Author:  Weijie Gao <weijie.gao@mediatek.com>
+ */
+
+#ifndef _DT_BINDINGS_MT7628_RESET_H_
+#define _DT_BINDINGS_MT7628_RESET_H_
+
+#define MT7628_PWM_RST			31
+#define MT7628_SDXC_RST			30
+#define MT7628_CRYPTO_RST		29
+#define MT7628_AUX_STCK_RST		28
+#define MT7628_PCIE_RST			26
+#define MT7628_EPHY_RST			24
+#define MT7628_ETH_RST			23
+#define MT7628_UPHY_RST			22
+#define MT7628_UART2_RST		20
+#define MT7628_UART1_RST		19
+#define MT7628_SPI_RST			18
+#define MT7628_I2S_RST			17
+#define MT7628_I2C_RST			16
+#define MT7628_GDMA_RST			14
+#define MT7628_PIO_RST			13
+#define MT7628_UART0_RST		12
+#define MT7628_PCM_RST			11
+#define MT7628_MC_RST			10
+#define MT7628_INT_RST			9
+#define MT7628_TIMER_RST		8
+#define MT7628_HIF_RST			5
+#define MT7628_WIFI_RST			4
+#define MT7628_SPIS_RST			3
+#define MT7628_SYS_RST			0
+
+#endif /* _DT_BINDINGS_MT7628_RESET_H_ */