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| author | Tom Rini <trini@konsulko.com> | 2019-10-25 20:07:24 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2019-10-25 20:07:24 -0400 |
| commit | ffc379b42c85466e1dd4c8fee8268801f26d2ab8 (patch) | |
| tree | ce8d48fcb69b088a1da5404dfef941907206f224 /include/dt-bindings/reset | |
| parent | 15147dc6a96697880cf355ed9df127bd8c896f2c (diff) | |
| parent | ec54c8c0001d151e9ba59410d35fe6a02fdcaf12 (diff) | |
| download | u-boot-ffc379b42c85466e1dd4c8fee8268801f26d2ab8.tar.gz | |
Merge tag 'mips-pull-2019-10-25' of git://git.denx.de/u-boot-mipsWIP/25Oct2019
- bmips: add BCRM NAND support for BCM6368, BCM6328, BCM6362 and BCM63268 SoCs
- bmips: various small fixes
- mtmips: add new drivers for clock, reset-controller and pinctrl
- mtmips: add support for high speed UART
- mtmips: update/enhance drivers for SPI and ethernet
- mtmips: add support for MMC
Diffstat (limited to 'include/dt-bindings/reset')
| -rw-r--r-- | include/dt-bindings/reset/bcm6362-reset.h | 2 | ||||
| -rw-r--r-- | include/dt-bindings/reset/mt7628-reset.h | 36 |
2 files changed, 37 insertions, 1 deletions
diff --git a/include/dt-bindings/reset/bcm6362-reset.h b/include/dt-bindings/reset/bcm6362-reset.h index 6e257ce78f..8202e49919 100644 --- a/include/dt-bindings/reset/bcm6362-reset.h +++ b/include/dt-bindings/reset/bcm6362-reset.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright (C) 2018 Ãlvaro Fernández Rojas <noltari@gmail.com> + * Copyright (C) 2018 Álvaro Fernández Rojas <noltari@gmail.com> * * Derived from linux/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h */ diff --git a/include/dt-bindings/reset/mt7628-reset.h b/include/dt-bindings/reset/mt7628-reset.h new file mode 100644 index 0000000000..2a674c1ea7 --- /dev/null +++ b/include/dt-bindings/reset/mt7628-reset.h @@ -0,0 +1,36 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2019 MediaTek Inc. + * + * Author: Weijie Gao <weijie.gao@mediatek.com> + */ + +#ifndef _DT_BINDINGS_MT7628_RESET_H_ +#define _DT_BINDINGS_MT7628_RESET_H_ + +#define MT7628_PWM_RST 31 +#define MT7628_SDXC_RST 30 +#define MT7628_CRYPTO_RST 29 +#define MT7628_AUX_STCK_RST 28 +#define MT7628_PCIE_RST 26 +#define MT7628_EPHY_RST 24 +#define MT7628_ETH_RST 23 +#define MT7628_UPHY_RST 22 +#define MT7628_UART2_RST 20 +#define MT7628_UART1_RST 19 +#define MT7628_SPI_RST 18 +#define MT7628_I2S_RST 17 +#define MT7628_I2C_RST 16 +#define MT7628_GDMA_RST 14 +#define MT7628_PIO_RST 13 +#define MT7628_UART0_RST 12 +#define MT7628_PCM_RST 11 +#define MT7628_MC_RST 10 +#define MT7628_INT_RST 9 +#define MT7628_TIMER_RST 8 +#define MT7628_HIF_RST 5 +#define MT7628_WIFI_RST 4 +#define MT7628_SPIS_RST 3 +#define MT7628_SYS_RST 0 + +#endif /* _DT_BINDINGS_MT7628_RESET_H_ */ |