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author | Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> | 2020-10-16 08:37:13 +0100 |
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committer | Marek Vasut <marek.vasut+renesas@gmail.com> | 2020-10-20 12:56:51 +0200 |
commit | fc5e5522096af4917b189055dcd91e8d50c52149 (patch) | |
tree | 9c6f406487296bad3b13419748ba024a899ad60f /include/dt-bindings/power | |
parent | 051f1499c9755a78f59b8b657d98590d76f0bdae (diff) | |
download | u-boot-fc5e5522096af4917b189055dcd91e8d50c52149.tar.gz |
arm: dts: r8a774c0: Import DTS from Linux 5.9
Import R8A774C0 (RZ/G2E) SoC DTSI and headers from Linux 5.9
commit bbf5c979011a ("Linux 5.9").
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Diffstat (limited to 'include/dt-bindings/power')
-rw-r--r-- | include/dt-bindings/power/r8a774c0-sysc.h | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/include/dt-bindings/power/r8a774c0-sysc.h b/include/dt-bindings/power/r8a774c0-sysc.h new file mode 100644 index 0000000000..dd0cd656d9 --- /dev/null +++ b/include/dt-bindings/power/r8a774c0-sysc.h @@ -0,0 +1,25 @@ +/* SPDX-License-Identifier: GPL-2.0 + * + * Copyright (C) 2020 Renesas Electronics Corp. + */ +#ifndef __DT_BINDINGS_POWER_R8A774C0_SYSC_H__ +#define __DT_BINDINGS_POWER_R8A774C0_SYSC_H__ + +/* + * These power domain indices match the numbers of the interrupt bits + * representing the power areas in the various Interrupt Registers + * (e.g. SYSCISR, Interrupt Status Register) + */ + +#define R8A774C0_PD_CA53_CPU0 5 +#define R8A774C0_PD_CA53_CPU1 6 +#define R8A774C0_PD_A3VC 14 +#define R8A774C0_PD_3DG_A 17 +#define R8A774C0_PD_3DG_B 18 +#define R8A774C0_PD_CA53_SCU 21 +#define R8A774C0_PD_A2VC1 26 + +/* Always-on power area */ +#define R8A774C0_PD_ALWAYS_ON 32 + +#endif /* __DT_BINDINGS_POWER_R8A774C0_SYSC_H__ */ |