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authorBiju Das <biju.das.jz@bp.renesas.com>2020-09-16 09:05:07 +0100
committerMarek Vasut <marek.vasut+renesas@gmail.com>2020-09-26 17:25:43 +0200
commit1abdab94f1294989bdffab5adefc2f59e29d1b70 (patch)
treed6e9797d208add65e081069f4443ba77e6a4aca8 /include/dt-bindings/power
parent00407251c377e57f1192f79f90e5f7e1f2bfe975 (diff)
downloadu-boot-1abdab94f1294989bdffab5adefc2f59e29d1b70.tar.gz
arm: dts: r8a774b1: Import DTS from Linux 5.9-rc4
Import R8A774B1 (RZ/G2N) SoC DTSI and headers from upstream Linux kernel 5.9-rc4 commit f4d51dffc6c0 ("Linux 5.9-rc4") Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Diffstat (limited to 'include/dt-bindings/power')
-rw-r--r--include/dt-bindings/power/r8a774b1-sysc.h26
1 files changed, 26 insertions, 0 deletions
diff --git a/include/dt-bindings/power/r8a774b1-sysc.h b/include/dt-bindings/power/r8a774b1-sysc.h
new file mode 100644
index 0000000000..96afda0446
--- /dev/null
+++ b/include/dt-bindings/power/r8a774b1-sysc.h
@@ -0,0 +1,26 @@
+/* SPDX-License-Identifier: GPL-2.0
+ *
+ * Copyright (C) 2020 Renesas Electronics Corp.
+ */
+#ifndef __DT_BINDINGS_POWER_R8A774B1_SYSC_H__
+#define __DT_BINDINGS_POWER_R8A774B1_SYSC_H__
+
+/*
+ * These power domain indices match the numbers of the interrupt bits
+ * representing the power areas in the various Interrupt Registers
+ * (e.g. SYSCISR, Interrupt Status Register)
+ */
+
+#define R8A774B1_PD_CA57_CPU0 0
+#define R8A774B1_PD_CA57_CPU1 1
+#define R8A774B1_PD_A3VP 9
+#define R8A774B1_PD_CA57_SCU 12
+#define R8A774B1_PD_A3VC 14
+#define R8A774B1_PD_3DG_A 17
+#define R8A774B1_PD_3DG_B 18
+#define R8A774B1_PD_A2VC1 26
+
+/* Always-on power area */
+#define R8A774B1_PD_ALWAYS_ON 32
+
+#endif /* __DT_BINDINGS_POWER_R8A774B1_SYSC_H__ */