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authorMarek Vasut <marek.vasut+renesas@gmail.com>2017-10-08 20:52:52 +0200
committerMarek Vasut <marex@denx.de>2017-12-09 13:36:25 +0100
commit1154541a528ac8bacdbdaccdb177dc64985fe7cb (patch)
treec33a1f6bb49732db981ce315e776a3a98c6d6d0b /include/dt-bindings/power/r8a77995-sysc.h
parent5cb19e7ad5be07de3b1368f3ff4349396e504002 (diff)
downloadu-boot-1154541a528ac8bacdbdaccdb177dc64985fe7cb.tar.gz
ARM: rmobile: Add R8A77995 SoC
Add bits to support yet another SoC, the R8A77995 D3 . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Diffstat (limited to 'include/dt-bindings/power/r8a77995-sysc.h')
-rw-r--r--include/dt-bindings/power/r8a77995-sysc.h23
1 files changed, 23 insertions, 0 deletions
diff --git a/include/dt-bindings/power/r8a77995-sysc.h b/include/dt-bindings/power/r8a77995-sysc.h
new file mode 100644
index 0000000000..09d0ed575b
--- /dev/null
+++ b/include/dt-bindings/power/r8a77995-sysc.h
@@ -0,0 +1,23 @@
+/*
+ * Copyright (C) 2017 Glider bvba
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ */
+#ifndef __DT_BINDINGS_POWER_R8A77995_SYSC_H__
+#define __DT_BINDINGS_POWER_R8A77995_SYSC_H__
+
+/*
+ * These power domain indices match the numbers of the interrupt bits
+ * representing the power areas in the various Interrupt Registers
+ * (e.g. SYSCISR, Interrupt Status Register)
+ */
+
+#define R8A77995_PD_CA53_CPU0 5
+#define R8A77995_PD_CA53_SCU 21
+
+/* Always-on power area */
+#define R8A77995_PD_ALWAYS_ON 32
+
+#endif /* __DT_BINDINGS_POWER_R8A77995_SYSC_H__ */