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authorMarcel Ziswiler <marcel.ziswiler@toradex.com>2016-11-14 21:40:26 +0100
committerMarek Vasut <marex@denx.de>2016-11-23 13:53:20 +0100
commitcbfa67a16b345cfb94840a41ee2fa0f728be296a (patch)
treef17f553f72639e9164dfe227f02d4f0aeda4c996 /include/dm
parentd804a5e1c369e59f23723cd21e1e422b7702a0ac (diff)
downloadu-boot-cbfa67a16b345cfb94840a41ee2fa0f728be296a.tar.gz
serial: pxa: integrate optional driver model handling
Optional driver model handling integration. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Marek Vasut <marex@denx.de>
Diffstat (limited to 'include/dm')
-rw-r--r--include/dm/platform_data/serial_pxa.h56
1 files changed, 56 insertions, 0 deletions
diff --git a/include/dm/platform_data/serial_pxa.h b/include/dm/platform_data/serial_pxa.h
new file mode 100644
index 0000000000..b19a4a6521
--- /dev/null
+++ b/include/dm/platform_data/serial_pxa.h
@@ -0,0 +1,56 @@
+/*
+ * Copyright (c) 2016 Marcel Ziswiler <marcel.ziswiler@toradex.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __SERIAL_PXA_H
+#define __SERIAL_PXA_H
+
+/*
+ * The numbering scheme differs here for PXA25x, PXA27x and PXA3xx so we can
+ * easily handle enabling of clock.
+ */
+#ifdef CONFIG_CPU_MONAHANS
+#define UART_CLK_BASE CKENA_21_BTUART
+#define UART_CLK_REG CKENA
+#define BTUART_INDEX 0
+#define FFUART_INDEX 1
+#define STUART_INDEX 2
+#elif CONFIG_CPU_PXA25X
+#define UART_CLK_BASE (1 << 4) /* HWUART */
+#define UART_CLK_REG CKEN
+#define HWUART_INDEX 0
+#define STUART_INDEX 1
+#define FFUART_INDEX 2
+#define BTUART_INDEX 3
+#else /* PXA27x */
+#define UART_CLK_BASE CKEN5_STUART
+#define UART_CLK_REG CKEN
+#define STUART_INDEX 0
+#define FFUART_INDEX 1
+#define BTUART_INDEX 2
+#endif
+
+/*
+ * Only PXA250 has HWUART, to avoid poluting the code with more macros,
+ * artificially introduce this.
+ */
+#ifndef CONFIG_CPU_PXA25X
+#define HWUART_INDEX 0xff
+#endif
+
+/*
+ * struct pxa_serial_platdata - information about a PXA port
+ *
+ * @base: Uart port base register address
+ * @port: Uart port index, for cpu with pinmux for uart / gpio
+ * baudrtatre: Uart port baudrate
+ */
+struct pxa_serial_platdata {
+ struct pxa_uart_regs *base;
+ int port;
+ int baudrate;
+};
+
+#endif /* __SERIAL_PXA_H */