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authorKyle Moffett <Kyle.D.Moffett@boeing.com>2011-03-28 11:35:48 -0400
committerKumar Gala <galak@kernel.crashing.org>2011-04-04 09:24:43 -0500
commitc7fd27ccfb3225ffaf2ad88c44a89eeccc1008ac (patch)
tree9286d6c8bc3c4422e4d6a21252957be3117555a7 /include/ddr_spd.h
parente820a131f4084397a212c6ffe3ed8ea0ce43631f (diff)
downloadu-boot-c7fd27ccfb3225ffaf2ad88c44a89eeccc1008ac.tar.gz
mpc8xxx: DDR2/DDR3: Clean up DIMM-type switch statements
The numeric constants in the switch statements are replaced by #defines added to the common ddr_spd.h header. This dramatically improves the readability of the switch statments. In addition, a few of the longer lines were cleaned up, and the DDR2 type for an SO-RDIMM module was added to the DDR2 switch statement. Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com> Cc: Andy Fleming <afleming@gmail.com> Cc: Kim Phillips <kim.phillips@freescale.com> Acked-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'include/ddr_spd.h')
-rw-r--r--include/ddr_spd.h28
1 files changed, 19 insertions, 9 deletions
diff --git a/include/ddr_spd.h b/include/ddr_spd.h
index 710e5289c7..e895d615a8 100644
--- a/include/ddr_spd.h
+++ b/include/ddr_spd.h
@@ -304,14 +304,24 @@ extern unsigned int ddr3_spd_check(const ddr3_spd_eeprom_t *spd);
#define SPD_MEMTYPE_DDR2_FBDIMM_PROBE (0x0A)
#define SPD_MEMTYPE_DDR3 (0x0B)
-/*
- * Byte 3 Key Byte / Module Type for DDR3 SPD
- */
-#define SPD_MODULETYPE_RDIMM (0x01)
-#define SPD_MODULETYPE_UDIMM (0x02)
-#define SPD_MODULETYPE_SODIMM (0x03)
-#define SPD_MODULETYPE_MICRODIMM (0x04)
-#define SPD_MODULETYPE_MINIRDIMM (0x05)
-#define SPD_MODULETYPE_MINIUDIMM (0x06)
+/* DIMM Type for DDR2 SPD (according to v1.3) */
+#define DDR2_SPD_DIMMTYPE_UNDEFINED (0x00)
+#define DDR2_SPD_DIMMTYPE_RDIMM (0x01)
+#define DDR2_SPD_DIMMTYPE_UDIMM (0x02)
+#define DDR2_SPD_DIMMTYPE_SO_DIMM (0x04)
+#define DDR2_SPD_DIMMTYPE_72B_SO_CDIMM (0x06)
+#define DDR2_SPD_DIMMTYPE_72B_SO_RDIMM (0x07)
+#define DDR2_SPD_DIMMTYPE_MICRO_DIMM (0x08)
+#define DDR2_SPD_DIMMTYPE_MINI_RDIMM (0x10)
+#define DDR2_SPD_DIMMTYPE_MINI_UDIMM (0x20)
+
+/* Byte 3 Key Byte / Module Type for DDR3 SPD */
+#define DDR3_SPD_MODULETYPE_MASK (0x0f)
+#define DDR3_SPD_MODULETYPE_RDIMM (0x01)
+#define DDR3_SPD_MODULETYPE_UDIMM (0x02)
+#define DDR3_SPD_MODULETYPE_SO_DIMM (0x03)
+#define DDR3_SPD_MODULETYPE_MICRO_DIMM (0x04)
+#define DDR3_SPD_MODULETYPE_MINI_RDIMM (0x05)
+#define DDR3_SPD_MODULETYPE_MINI_UDIMM (0x06)
#endif /* _DDR_SPD_H_ */