Merge tag 'u-boot-imx-20181025' of git://git.denx.de/u-boot-imx

Merged imx8 architecture, fix build for imx8 + warnings

17 files changed, 422 insertions, 28 deletions

diff --git a/include/configs/aristainetos-common.h b/include/configs/aristainetos-common.h
index baddd1c330..ca974c015f 100644
--- a/include/configs/aristainetos-common.h
+++ b/include/configs/aristainetos-common.h
@@ -192,9 +192,6 @@
 
 /* UBI support */
 
-#define CONFIG_HW_WATCHDOG
-#define CONFIG_IMX_WATCHDOG
-
 /* Framebuffer */
 #define CONFIG_VIDEO_IPUV3
 /* check this console not needed, after test remove it */
diff --git a/include/configs/cl-som-imx7.h b/include/configs/cl-som-imx7.h
index 1b2eee3f18..f84a11215e 100644
--- a/include/configs/cl-som-imx7.h
+++ b/include/configs/cl-som-imx7.h
@@ -10,8 +10,6 @@
 
 #include "mx7_common.h"
 
-#define CONFIG_DBG_MONITOR
-
 #define CONFIG_MXC_UART_BASE            UART1_IPS_BASE_ADDR
 
 /* Size of malloc() pool */
diff --git a/include/configs/colibri-imx6ull.h b/include/configs/colibri-imx6ull.h
index f2db039454..7cf550cf9e 100644
--- a/include/configs/colibri-imx6ull.h
+++ b/include/configs/colibri-imx6ull.h
@@ -13,7 +13,6 @@
 #include "mx6_common.h"
 #define CONFIG_IOMUX_LPSR
 
-/* #define CONFIG_DBG_MONITOR*/
 #define PHYS_SDRAM_SIZE			SZ_512M
 
 /* Size of malloc() pool */
diff --git a/include/configs/colibri_imx7.h b/include/configs/colibri_imx7.h
index ff6bd678cf..c31cf2888a 100644
--- a/include/configs/colibri_imx7.h
+++ b/include/configs/colibri_imx7.h
@@ -13,9 +13,6 @@
 
 #include "mx7_common.h"
 
-/*#define CONFIG_DBG_MONITOR*/
-#define PHYS_SDRAM_SIZE			SZ_1G
-
 /* Size of malloc() pool */
 #define CONFIG_SYS_MALLOC_LEN		(32 * SZ_1M)
 
diff --git a/include/configs/dh_imx6.h b/include/configs/dh_imx6.h
index 6c833e7a27..9231bd853f 100644
--- a/include/configs/dh_imx6.h
+++ b/include/configs/dh_imx6.h
@@ -109,8 +109,6 @@
 #endif
 
 /* Watchdog */
-#define CONFIG_HW_WATCHDOG
-#define CONFIG_IMX_WATCHDOG
 #define CONFIG_WATCHDOG_TIMEOUT_MSECS	60000
 
 /* allow to overwrite serial and ethaddr */
diff --git a/include/configs/display5.h b/include/configs/display5.h
index 6d00699ebd..1fb7469182 100644
--- a/include/configs/display5.h
+++ b/include/configs/display5.h
@@ -368,8 +368,6 @@
 /* Commands */
 
 /* Watchdog */
-#define CONFIG_HW_WATCHDOG
-#define CONFIG_IMX_WATCHDOG
 #define CONFIG_WATCHDOG_TIMEOUT_MSECS   15000
 
 /* ENV config */
diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h
index fad840b9b2..e0e1f713ef 100644
--- a/include/configs/ge_bx50v3.h
+++ b/include/configs/ge_bx50v3.h
@@ -31,8 +31,6 @@
 #define CONFIG_REVISION_TAG
 #define CONFIG_SYS_MALLOC_LEN		(10 * SZ_1M)
 
-#define CONFIG_HW_WATCHDOG
-#define CONFIG_IMX_WATCHDOG
 #define CONFIG_WATCHDOG_TIMEOUT_MSECS 6000
 
 #define CONFIG_MXC_UART
diff --git a/include/configs/imx8qxp_mek.h b/include/configs/imx8qxp_mek.h
new file mode 100644
index 0000000000..d34d174cac
--- /dev/null
+++ b/include/configs/imx8qxp_mek.h
@@ -0,0 +1,157 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2018 NXP
+ */
+
+#ifndef __IMX8QXP_MEK_H
+#define __IMX8QXP_MEK_H
+
+#include <linux/sizes.h>
+#include <asm/arch/imx-regs.h>
+
+#define CONFIG_REMAKE_ELF
+
+#define CONFIG_BOARD_EARLY_INIT_F
+
+/* Flat Device Tree Definitions */
+#define CONFIG_OF_BOARD_SETUP
+
+#undef CONFIG_CMD_EXPORTENV
+#undef CONFIG_CMD_IMPORTENV
+#undef CONFIG_CMD_IMLS
+
+#undef CONFIG_CMD_CRC32
+#undef CONFIG_BOOTM_NETBSD
+
+#define CONFIG_FSL_ESDHC
+#define CONFIG_FSL_USDHC
+#define CONFIG_SYS_FSL_ESDHC_ADDR       0
+#define USDHC1_BASE_ADDR                0x5B010000
+#define USDHC2_BASE_ADDR                0x5B020000
+#define CONFIG_SUPPORT_EMMC_BOOT	/* eMMC specific */
+
+#define CONFIG_ENV_OVERWRITE
+
+#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
+
+/* Initial environment variables */
+#define CONFIG_EXTRA_ENV_SETTINGS		\
+	"script=boot.scr\0" \
+	"image=Image\0" \
+	"panel=NULL\0" \
+	"console=ttyLP0,${baudrate} earlycon=lpuart32,0x5a060000,${baudrate}\0" \
+	"fdt_addr=0x83000000\0"			\
+	"fdt_high=0xffffffffffffffff\0"		\
+	"boot_fdt=try\0" \
+	"fdt_file=fsl-imx8qxp-mek.dtb\0" \
+	"initrd_addr=0x83800000\0"		\
+	"initrd_high=0xffffffffffffffff\0" \
+	"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
+	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
+	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
+	"mmcautodetect=yes\0" \
+	"mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \
+	"loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
+	"bootscript=echo Running bootscript from mmc ...; " \
+		"source\0" \
+	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
+	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
+	"mmcboot=echo Booting from mmc ...; " \
+		"run mmcargs; " \
+		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
+			"if run loadfdt; then " \
+				"booti ${loadaddr} - ${fdt_addr}; " \
+			"else " \
+				"echo WARN: Cannot load the DT; " \
+			"fi; " \
+		"else " \
+			"echo wait for boot; " \
+		"fi;\0" \
+	"netargs=setenv bootargs console=${console} " \
+		"root=/dev/nfs " \
+		"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
+	"netboot=echo Booting from net ...; " \
+		"run netargs;  " \
+		"if test ${ip_dyn} = yes; then " \
+			"setenv get_cmd dhcp; " \
+		"else " \
+			"setenv get_cmd tftp; " \
+		"fi; " \
+		"${get_cmd} ${loadaddr} ${image}; " \
+		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
+			"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
+				"booti ${loadaddr} - ${fdt_addr}; " \
+			"else " \
+				"echo WARN: Cannot load the DT; " \
+			"fi; " \
+		"else " \
+			"booti; " \
+		"fi;\0"
+
+#define CONFIG_BOOTCOMMAND \
+	   "mmc dev ${mmcdev}; if mmc rescan; then " \
+		   "if run loadbootscript; then " \
+			   "run bootscript; " \
+		   "else " \
+			   "if run loadimage; then " \
+				   "run mmcboot; " \
+			   "else run netboot; " \
+			   "fi; " \
+		   "fi; " \
+	   "else booti ${loadaddr} - ${fdt_addr}; fi"
+
+/* Link Definitions */
+#define CONFIG_LOADADDR			0x80280000
+
+#define CONFIG_SYS_LOAD_ADDR           CONFIG_LOADADDR
+
+#define CONFIG_SYS_INIT_SP_ADDR         0x80200000
+
+/* Default environment is in SD */
+#define CONFIG_ENV_SIZE			0x1000
+#define CONFIG_ENV_OFFSET		(64 * SZ_64K)
+#define CONFIG_SYS_MMC_ENV_PART		0	/* user area */
+
+#define CONFIG_SYS_MMC_IMG_LOAD_PART	1
+
+/* On LPDDR4 board, USDHC1 is for eMMC, USDHC2 is for SD on CPU board */
+#define CONFIG_SYS_MMC_ENV_DEV		1   /* USDHC2 */
+#define CONFIG_MMCROOT			"/dev/mmcblk1p2"  /* USDHC2 */
+#define CONFIG_SYS_FSL_USDHC_NUM	2
+
+/* Size of malloc() pool */
+#define CONFIG_SYS_MALLOC_LEN		((CONFIG_ENV_SIZE + (32 * 1024)) * 1024)
+
+#define CONFIG_SYS_SDRAM_BASE		0x80000000
+#define PHYS_SDRAM_1			0x80000000
+#define PHYS_SDRAM_2			0x880000000
+#define PHYS_SDRAM_1_SIZE		0x80000000	/* 2 GB */
+/* LPDDR4 board total DDR is 3GB */
+#define PHYS_SDRAM_2_SIZE		0x40000000	/* 1 GB */
+
+/* Serial */
+#define CONFIG_BAUDRATE			115200
+
+/* Monitor Command Prompt */
+#define CONFIG_HUSH_PARSER
+#define CONFIG_SYS_PROMPT_HUSH_PS2     "> "
+#define CONFIG_SYS_CBSIZE              2048
+#define CONFIG_SYS_MAXARGS             64
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
+#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
+					sizeof(CONFIG_SYS_PROMPT) + 16)
+
+/* Generic Timer Definitions */
+#define COUNTER_FREQUENCY		8000000	/* 8MHz */
+
+#ifndef CONFIG_DM_PCA953X
+#define CONFIG_PCA953X
+#define CONFIG_CMD_PCA953X
+#define CONFIG_CMD_PCA953X_INFO
+#endif
+
+/* Networking */
+#define CONFIG_FEC_XCV_TYPE		RGMII
+#define FEC_QUIRK_ENET_MAC
+
+#endif /* __IMX8QXP_MEK_H */
diff --git a/include/configs/kp_imx6q_tpc.h b/include/configs/kp_imx6q_tpc.h
index 704383090f..b6b27ee1d5 100644
--- a/include/configs/kp_imx6q_tpc.h
+++ b/include/configs/kp_imx6q_tpc.h
@@ -67,8 +67,6 @@
 #endif
 
 /* Watchdog */
-#define CONFIG_HW_WATCHDOG
-#define CONFIG_IMX_WATCHDOG
 #define CONFIG_WATCHDOG_TIMEOUT_MSECS	60000
 
 /* allow to overwrite serial and ethaddr */
diff --git a/include/configs/m53menlo.h b/include/configs/m53menlo.h
new file mode 100644
index 0000000000..94214b135d
--- /dev/null
+++ b/include/configs/m53menlo.h
@@ -0,0 +1,246 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+
+/*
+ * Menlosystems M53Menlo configuration
+ * Copyright (C) 2012-2017 Marek Vasut <marex@denx.de>
+ * Copyright (C) 2014-2017 Olaf Mandel <o.mandel@menlosystems.com>
+ */
+
+#ifndef __M53MENLO_CONFIG_H__
+#define __M53MENLO_CONFIG_H__
+
+#include <asm/arch/imx-regs.h>
+
+#define CONFIG_REVISION_TAG
+#define CONFIG_SYS_FSL_CLK
+
+#define CONFIG_TIMESTAMP		/* Print image info with timestamp */
+
+/*
+ * Memory configurations
+ */
+#define PHYS_SDRAM_1			CSD0_BASE_ADDR
+#define PHYS_SDRAM_1_SIZE		(gd->bd->bi_dram[0].size)
+#define PHYS_SDRAM_2			CSD1_BASE_ADDR
+#define PHYS_SDRAM_2_SIZE		(gd->bd->bi_dram[1].size)
+#define PHYS_SDRAM_SIZE			(gd->ram_size)
+#define CONFIG_SYS_MALLOC_LEN		(10 * 1024 * 1024)
+#define CONFIG_SYS_MEMTEST_START	0x70000000
+#define CONFIG_SYS_MEMTEST_END		0x8ff00000
+
+#define CONFIG_SYS_SDRAM_BASE		(PHYS_SDRAM_1)
+#define CONFIG_SYS_INIT_RAM_ADDR	(IRAM_BASE_ADDR)
+#define CONFIG_SYS_INIT_RAM_SIZE	(IRAM_SIZE)
+
+#define CONFIG_SYS_INIT_SP_OFFSET \
+	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR \
+	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
+
+/*
+ * U-Boot general configurations
+ */
+#define CONFIG_SYS_CBSIZE	1024		/* Console I/O buffer size */
+#define CONFIG_SYS_MAXARGS	32		/* Max number of command args */
+#define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE
+						/* Boot argument buffer size */
+
+/*
+ * Serial Driver
+ */
+#define CONFIG_MXC_UART
+#define CONFIG_MXC_UART_BASE		UART1_BASE
+
+/*
+ * MMC Driver
+ */
+#ifdef CONFIG_CMD_MMC
+#define CONFIG_SYS_FSL_ESDHC_ADDR	0
+#define CONFIG_SYS_FSL_ESDHC_NUM	1
+#endif
+
+/*
+ * NAND
+ */
+#define CONFIG_ENV_SIZE			(16 * 1024)
+#ifdef CONFIG_CMD_NAND
+#define CONFIG_SYS_MAX_NAND_DEVICE	1
+#define CONFIG_SYS_NAND_BASE		NFC_BASE_ADDR_AXI
+#define CONFIG_MXC_NAND_REGS_BASE	NFC_BASE_ADDR_AXI
+#define CONFIG_MXC_NAND_IP_REGS_BASE	NFC_BASE_ADDR
+#define CONFIG_SYS_NAND_LARGEPAGE
+#define CONFIG_MXC_NAND_HWECC
+#define CONFIG_SYS_NAND_USE_FLASH_BBT
+
+/* Environment is in NAND */
+#define CONFIG_ENV_SIZE_REDUND		CONFIG_ENV_SIZE
+#define CONFIG_ENV_SECT_SIZE		(128 * 1024)
+#define CONFIG_ENV_RANGE		(4 * CONFIG_ENV_SECT_SIZE)
+#define CONFIG_ENV_OFFSET		(8 * CONFIG_ENV_SECT_SIZE) /* 1 MiB */
+#define CONFIG_ENV_OFFSET_REDUND	\
+		(CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE)
+#endif
+
+/*
+ * Ethernet on SOC (FEC)
+ */
+#ifdef CONFIG_CMD_NET
+#define CONFIG_FEC_MXC
+#define IMX_FEC_BASE			FEC_BASE_ADDR
+#define CONFIG_FEC_MXC_PHYADDR		0x0
+#define CONFIG_MII
+#define CONFIG_DISCOVER_PHY
+#define CONFIG_FEC_XCV_TYPE		RMII
+#define CONFIG_ETHPRIME			"FEC0"
+#endif
+
+/*
+ * I2C
+ */
+#ifdef CONFIG_CMD_I2C
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
+#define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
+#define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
+#define CONFIG_SYS_RTC_BUS_NUM		1 /* I2C2 */
+#endif
+
+/*
+ * RTC
+ */
+#ifdef CONFIG_CMD_DATE
+#define CONFIG_RTC_M41T62
+#define CONFIG_SYS_I2C_RTC_ADDR		0x68
+#define CONFIG_SYS_M41T11_BASE_YEAR	2000
+#endif
+
+/*
+ * USB
+ */
+#ifdef CONFIG_CMD_USB
+#define CONFIG_USB_EHCI_MX5
+#define CONFIG_MXC_USB_PORT		1
+#define CONFIG_MXC_USB_PORTSC		(PORT_PTS_UTMI | PORT_PTS_PTW)
+#define CONFIG_MXC_USB_FLAGS		0
+#endif
+
+/*
+ * SATA
+ */
+#ifdef CONFIG_CMD_SATA
+#define CONFIG_SYS_SATA_MAX_DEVICE	1
+#define CONFIG_DWC_AHSATA_PORT_ID	0
+#define CONFIG_DWC_AHSATA_BASE_ADDR	SATA_BASE_ADDR
+#define CONFIG_LBA48
+#endif
+
+/*
+ * LCD
+ */
+#ifdef CONFIG_VIDEO
+#define CONFIG_VIDEO_IPUV3
+#define CONFIG_VIDEO_BMP_RLE8
+#define CONFIG_VIDEO_BMP_GZIP
+#define CONFIG_SPLASH_SCREEN
+#define CONFIG_SPLASHIMAGE_GUARD
+#define CONFIG_SPLASH_SCREEN_ALIGN
+#define CONFIG_BMP_16BPP
+#define CONFIG_VIDEO_LOGO
+#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE	(2 << 20)
+#endif
+
+/* LVDS display */
+#define CONFIG_SYS_LDB_CLOCK			33260000
+#define CONFIG_IMX_VIDEO_SKIP
+#define CONFIG_SPLASH_SOURCE
+
+/* IIM Fuses */
+#define CONFIG_FSL_IIM
+
+/*
+ * Boot Linux
+ */
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_INITRD_TAG
+#define CONFIG_REVISION_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_BOOTFILE		"boot/fitImage"
+#define CONFIG_LOADADDR		0x70800000
+#define CONFIG_BOOTCOMMAND	"run mmc_mmc"
+#define CONFIG_SYS_LOAD_ADDR	CONFIG_LOADADDR
+
+/*
+ * NAND SPL
+ */
+#define CONFIG_SPL_TARGET		"u-boot-with-nand-spl.imx"
+#define CONFIG_SPL_TEXT_BASE		0x70008000
+#define CONFIG_SPL_PAD_TO		0x8000
+#define CONFIG_SPL_STACK		0x70004000
+
+#define CONFIG_SYS_NAND_U_BOOT_OFFS	CONFIG_SPL_PAD_TO
+#define CONFIG_SYS_NAND_PAGE_SIZE	2048
+#define CONFIG_SYS_NAND_OOBSIZE		64
+#define CONFIG_SYS_NAND_PAGE_COUNT	64
+#define CONFIG_SYS_NAND_SIZE		(256 * 1024 * 1024)
+#define CONFIG_SYS_NAND_BAD_BLOCK_POS	0
+
+/*
+ * Extra Environments
+ */
+#define CONFIG_PREBOOT		"run try_bootscript"
+#define CONFIG_HOSTNAME		"m53menlo"
+
+#define CONFIG_EXTRA_ENV_SETTINGS					\
+	"consdev=ttymxc0\0"						\
+	"baudrate=115200\0"						\
+	"bootscript=boot.scr\0"						\
+	"mmcdev=0\0"							\
+	"mmcpart=1\0"							\
+	"rootpath=/srv/\0"						\
+	"kernel_addr_r=0x72000000\0"					\
+	"mtdids=" CONFIG_MTDIDS_DEFAULT "\0"				\
+	"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0"			\
+	"netdev=eth0\0"							\
+	"splashsource=mmc_fs\0"						\
+	"splashfile=usplash.bmp.gz\0"					\
+	"splashimage=0x88000000\0"					\
+	"splashpos=m,m\0"						\
+	"addcons="							\
+		"setenv bootargs ${bootargs} "				\
+		"console=${consdev},${baudrate}\0"			\
+	"addip="							\
+		"setenv bootargs ${bootargs} "				\
+		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"	\
+		":${hostname}:${netdev}:off\0"				\
+	"addmtd=setenv bootargs ${bootargs} mtdparts=${mtdparts}\0"	\
+	"addmisc="							\
+		"setenv bootargs ${bootargs} ${miscargs}\0"		\
+	"addargs=run addcons addmisc addmtd\0"				\
+	"mmcload="							\
+		"mmc rescan ; load mmc ${mmcdev}:${mmcpart} "		\
+		"${kernel_addr_r} ${bootfile}\0"			\
+	"miscargs=nohlt panic=1\0"					\
+	"mmcargs=setenv bootargs root=/dev/mmcblk0p${mmcpart} rw "	\
+		"rootwait\0"						\
+	"mmc_mmc="							\
+		"run mmcload mmcargs addargs ; "			\
+		"bootm ${kernel_addr_r}\0"				\
+	"netload=tftp ${kernel_addr_r} ${hostname}/${bootfile}\0"	\
+	"net_nfs="							\
+		"run netload nfsargs addip addargs ; "			\
+		"bootm ${kernel_addr_r}\0"				\
+	"nfsargs="							\
+		"setenv bootargs root=/dev/nfs rw "			\
+		"nfsroot=${serverip}:${rootpath}${hostname},v3,tcp\0"	\
+	"try_bootscript="						\
+		"mmc rescan;"						\
+		"if test -e mmc 0:1 ${bootscript} ; then "		\
+		"if load mmc 0:1 ${kernel_addr_r} ${bootscript};"	\
+		"then ; "						\
+			"echo Running bootscript... ; "			\
+			"source ${kernel_addr_r} ; "			\
+		"fi ; "							\
+		"fi\0"
+
+#endif	/* __M53MENLO_CONFIG_H__ */
diff --git a/include/configs/mx53ppd.h b/include/configs/mx53ppd.h
index bbd4cd78cd..d2a8e6571a 100644
--- a/include/configs/mx53ppd.h
+++ b/include/configs/mx53ppd.h
@@ -22,8 +22,6 @@
 /* Size of malloc() pool */
 #define CONFIG_SYS_MALLOC_LEN		(10 * 1024 * 1024)
 
-#define CONFIG_HW_WATCHDOG
-#define CONFIG_IMX_WATCHDOG
 #define CONFIG_WATCHDOG_TIMEOUT_MSECS 8000
 
 #define CONFIG_BOARD_LATE_INIT
diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h
index 87241ef4bf..ad919a671f 100644
--- a/include/configs/mx7dsabresd.h
+++ b/include/configs/mx7dsabresd.h
@@ -10,7 +10,6 @@
 
 #include "mx7_common.h"
 
-#define CONFIG_DBG_MONITOR
 #define PHYS_SDRAM_SIZE			SZ_1G
 
 #define CONFIG_MXC_UART_BASE            UART1_IPS_BASE_ADDR
diff --git a/include/configs/pico-imx6ul.h b/include/configs/pico-imx6ul.h
index 3d93205535..8082b74c9c 100644
--- a/include/configs/pico-imx6ul.h
+++ b/include/configs/pico-imx6ul.h
@@ -56,8 +56,8 @@
 
 #define CONFIG_DFU_ENV_SETTINGS \
 	"dfu_alt_info=" \
-		"spl raw 0x2 0x400 mmcpart 1;" \
-		"u-boot raw 0x8a 0x400 mmcpart 1;" \
+		"spl raw 0x2 0x400;" \
+		"u-boot raw 0x8a 0x400;" \
 		"/boot/zImage ext4 0 1;" \
 		"/boot/imx6ul-pico-hobbit.dtb ext4 0 1;" \
 		"/boot/imx6ul-pico-pi.dtb ext4 0 1;" \
@@ -103,6 +103,8 @@
 
 #define BOOT_TARGET_DEVICES(func) \
 	func(MMC, mmc, 0) \
+	func(USB, usb, 0) \
+	func(PXE, pxe, na) \
 	func(DHCP, dhcp, na)
 
 #include <config_distro_bootcmd.h>
diff --git a/include/configs/pico-imx7d.h b/include/configs/pico-imx7d.h
index 0e770bf41f..2bc42a04a0 100644
--- a/include/configs/pico-imx7d.h
+++ b/include/configs/pico-imx7d.h
@@ -45,8 +45,8 @@
 
 #define CONFIG_DFU_ENV_SETTINGS \
 	"dfu_alt_info=" \
-		"spl raw 0x2 0x400 mmcpart 1;" \
-		"u-boot raw 0x8a 0x400 mmcpart 1;" \
+		"spl raw 0x2 0x400;" \
+		"u-boot raw 0x8a 0x400;" \
 		"/boot/zImage ext4 0 1;" \
 		"/boot/imx7d-pico-hobbit.dtb ext4 0 1;" \
 		"/boot/imx7d-pico-pi.dtb ext4 0 1;" \
@@ -92,6 +92,8 @@
 
 #define BOOT_TARGET_DEVICES(func) \
 	func(MMC, mmc, 0) \
+	func(USB, usb, 0) \
+	func(PXE, pxe, na) \
 	func(DHCP, dhcp, na)
 
 #include <config_distro_bootcmd.h>
diff --git a/include/configs/tqma6_wru4.h b/include/configs/tqma6_wru4.h
index a945272595..34f000f214 100644
--- a/include/configs/tqma6_wru4.h
+++ b/include/configs/tqma6_wru4.h
@@ -17,8 +17,6 @@
 #define CONSOLE_DEV		"ttymxc3"
 
 /* Watchdog */
-#define CONFIG_HW_WATCHDOG
-#define CONFIG_IMX_WATCHDOG
 #define CONFIG_WATCHDOG_TIMEOUT_MSECS	60000
 
 /* Config on-board RTC */
diff --git a/include/configs/warp.h b/include/configs/warp.h
index f9c095dad3..9aa8a48d3d 100644
--- a/include/configs/warp.h
+++ b/include/configs/warp.h
@@ -26,8 +26,6 @@
 #define CONFIG_SUPPORT_EMMC_BOOT
 
 /* Watchdog */
-#define CONFIG_HW_WATCHDOG
-#define CONFIG_IMX_WATCHDOG
 #define CONFIG_WATCHDOG_TIMEOUT_MSECS 30000 /* 30s */
 
 #define CONFIG_SYS_MEMTEST_START	0x80000000
diff --git a/include/configs/warp7.h b/include/configs/warp7.h
index 1b656a5aaf..a391dfb5c1 100644
--- a/include/configs/warp7.h
+++ b/include/configs/warp7.h
@@ -13,6 +13,17 @@
 
 #define PHYS_SDRAM_SIZE			SZ_512M
 
+/*
+ * If we have defined the OPTEE ram size and not OPTEE it means that we were
+ * launched by OPTEE, because of that we shall skip all the low level
+ * initialization since it was already done by ATF or OPTEE
+ */
+#ifdef CONFIG_OPTEE_TZDRAM_SIZE
+#ifndef CONFIG_OPTEE
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#endif
+#endif
+
 #define CONFIG_MXC_UART_BASE		UART1_IPS_BASE_ADDR
 
 /* Size of malloc() pool */