diff options
| author | Nishanth Menon <nm@ti.com> | 2015-07-22 18:05:41 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2015-07-27 15:02:17 -0400 |
| commit | 9a0f4004caa057ba227292e544b67ca3d03ffd89 (patch) | |
| tree | 95a1496910b8c468804a1ba2c9825caa2c809e13 /include/configs/ti_armv7_common.h | |
| parent | 8845ad4f2e1475e7096f7aea0561f0b1262d5738 (diff) | |
| download | u-boot-9a0f4004caa057ba227292e544b67ca3d03ffd89.tar.gz | |
configs: split ti_armv7_common into a omap generic header
TI armv7 based SoCs are based on two architectures - one based on OMAP
generation architecture and others based on Keystone architecture.
Many of the options are architecture specific, however a lot are common
with v7 architecture. So, step 1 will be to move out OMAP specific stuff
from ti_armv7_common into a ti_armv7_omap.h header which is then used
by all the relevant architecture headers.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Diffstat (limited to 'include/configs/ti_armv7_common.h')
| -rw-r--r-- | include/configs/ti_armv7_common.h | 21 |
1 files changed, 0 insertions, 21 deletions
diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h index 34756de5a0..424f233d42 100644 --- a/include/configs/ti_armv7_common.h +++ b/include/configs/ti_armv7_common.h @@ -18,8 +18,6 @@ #define __CONFIG_TI_ARMV7_COMMON_H__ /* Common define for many platforms. */ -#define CONFIG_OMAP -#define CONFIG_OMAP_COMMON #define CONFIG_SYS_GENERIC_BOARD /* @@ -86,39 +84,20 @@ #define CONFIG_I2C #define CONFIG_CMD_I2C #define CONFIG_SYS_I2C -#define CONFIG_SYS_OMAP24_I2C_SPEED 100000 -#define CONFIG_SYS_OMAP24_I2C_SLAVE 1 -#define CONFIG_SYS_I2C_OMAP24XX /* MMC/SD IP block */ #define CONFIG_MMC #define CONFIG_GENERIC_MMC -#define CONFIG_OMAP_HSMMC #define CONFIG_CMD_MMC /* McSPI IP block */ #define CONFIG_SPI -#define CONFIG_OMAP3_SPI #define CONFIG_CMD_SPI /* GPIO block */ -#define CONFIG_OMAP_GPIO #define CONFIG_CMD_GPIO /* - * GPMC NAND block. We support 1 device and the physical address to - * access CS0 at is 0x8000000. - */ -#ifdef CONFIG_NAND -#define CONFIG_NAND_OMAP_GPMC -#ifndef CONFIG_SYS_NAND_BASE -#define CONFIG_SYS_NAND_BASE 0x8000000 -#endif -#define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_CMD_NAND -#endif - -/* * The following are general good-enough settings for U-Boot. We set a * large malloc pool as we generally have a lot of DDR, and we opt for * function over binary size in the main portion of U-Boot as this is |