diff options
| author | Tom Rini <trini@konsulko.com> | 2017-05-16 14:46:35 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2017-06-05 11:02:23 -0400 |
| commit | 8627733941ff9d35a3778da9c9b2e495a17bfe70 (patch) | |
| tree | f2cdc0b62f5a657ae405964c612d7856d7ceeb62 /include/configs/ti816x_evm.h | |
| parent | ffb56568626be636f0256795df5322633f50cde3 (diff) | |
| download | u-boot-8627733941ff9d35a3778da9c9b2e495a17bfe70.tar.gz | |
ti816x: Rework DDR initialization sequence
The ti816x/am389x SoC is the first generation in what U-Boot calls the
"am33xx" family. In the first generation of this family the DDR
initialization sequence is quite different from all of the subsequent
generations. Whereas with ti814x (second generation) we can easily work
the minor differenced between that and am33xx (third generation), our
attempts to do this for ti816x weren't sufficient. Rather than add a
large amount of #ifdef logic to make this different sequence work we add
a new file, ti816x_emif4.c to handle the various required undocumented
register writes and sequence and leverage what we can from
arch/arm/mach-omap2/am33xx/ddr.c still. As DDR2 has similar problems
today but I am unable to test it, we drop the DDR2 defines from the code
rather than imply that it works by leaving it. We also remove a bunch
of other untested code about changing the speed the DDR runs at.
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'include/configs/ti816x_evm.h')
| -rw-r--r-- | include/configs/ti816x_evm.h | 15 |
1 files changed, 0 insertions, 15 deletions
diff --git a/include/configs/ti816x_evm.h b/include/configs/ti816x_evm.h index 68eb08f812..f7f6f625a0 100644 --- a/include/configs/ti816x_evm.h +++ b/include/configs/ti816x_evm.h @@ -50,21 +50,6 @@ #define CONFIG_CMD_ASKENV -/* - * Only one of the following two options (DDR3/DDR2) should be enabled - * CONFIG_TI816X_EVM_DDR2 - * CONFIG_TI816X_EVM_DDR3 - */ -#define CONFIG_TI816X_EVM_DDR3 - -/* - * Supported values: 400, 531, 675 or 796 MHz - */ -#define CONFIG_TI816X_DDR_PLL_796 - -#define CONFIG_TI816X_USE_EMIF0 1 -#define CONFIG_TI816X_USE_EMIF1 1 - #define CONFIG_NR_DRAM_BANKS 2 /* we have 2 banks of DRAM */ #define PHYS_DRAM_1 0x80000000 /* DRAM Bank #1 */ #define PHYS_DRAM_1_SIZE 0x40000000 /* 1 GB */ |