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authorSimon Glass <sjg@chromium.org>2014-10-30 20:25:50 -0600
committerHans de Goede <hdegoede@redhat.com>2014-11-05 13:09:58 +0100
commit1a81cf8399675056beef5e76be8a9380d88c4ebf (patch)
treeb3bed5105b65070fbcf811baebe59fa0c105531a /include/configs/sunxi-common.h
parent7aa9748584227bd97b642f8127382c75df5f4730 (diff)
downloadu-boot-1a81cf8399675056beef5e76be8a9380d88c4ebf.tar.gz
dm: sunxi: Add support for serial using driver model
Add a driver for the designware serial UART used on sunxi. This just redirects to the normal ns16550 driver. Add a stdout-path to the device tree so that the correct UART is chosen. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Diffstat (limited to 'include/configs/sunxi-common.h')
-rw-r--r--include/configs/sunxi-common.h17
1 files changed, 11 insertions, 6 deletions
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index 316e7d93df..ce038eddf0 100644
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
@@ -30,6 +30,9 @@
#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_DM)
# define CONFIG_CMD_DM
# define CONFIG_DM_GPIO
+# define CONFIG_DM_SERIAL
+# define CONFIG_DW_SERIAL
+# define CONFIG_SYS_MALLOC_F_LEN (1 << 10)
#endif
/*
@@ -41,13 +44,15 @@
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
/* ns16550 reg in the low bits of cpu reg */
-#define CONFIG_SYS_NS16550_REG_SIZE -4
#define CONFIG_SYS_NS16550_CLK 24000000
-#define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE
-#define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE
-#define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE
-#define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE
-#define CONFIG_SYS_NS16550_COM5 SUNXI_R_UART_BASE
+#ifndef CONFIG_DM_SERIAL
+# define CONFIG_SYS_NS16550_REG_SIZE -4
+# define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE
+# define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE
+# define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE
+# define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE
+# define CONFIG_SYS_NS16550_COM5 SUNXI_R_UART_BASE
+#endif
/* DRAM Base */
#define CONFIG_SYS_SDRAM_BASE 0x40000000