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authorDirk Eibach <dirk.eibach@gdsys.cc>2016-06-02 09:05:41 +0200
committerTom Rini <trini@konsulko.com>2016-06-06 13:39:13 -0400
commit1d2541ba32c0ab144c9307edd4a76606ad528ce0 (patch)
tree996005d8961a2d10079cbe581666463efd50821e /include/configs/strider.h
parentdf3223f9f78a2d841c10fe5037f11bd28c03b6a5 (diff)
downloadu-boot-1d2541ba32c0ab144c9307edd4a76606ad528ce0.tar.gz
strider: Support con-dp flavor
There is a new strider console flavor with DisplayPort video. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Reviewed-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'include/configs/strider.h')
-rw-r--r--include/configs/strider.h67
1 files changed, 62 insertions, 5 deletions
diff --git a/include/configs/strider.h b/include/configs/strider.h
index 5803b660bc..20ffc0c61f 100644
--- a/include/configs/strider.h
+++ b/include/configs/strider.h
@@ -22,6 +22,8 @@
#ifdef CONFIG_STRIDER_CPU
#define CONFIG_IDENT_STRING " strider cpu 0.01"
+#elif defined(CONFIG_STRIDER_CON_DP)
+#define CONFIG_IDENT_STRING " strider con dp 0.01"
#else
#define CONFIG_IDENT_STRING " strider con 0.01"
#endif
@@ -225,15 +227,11 @@
/*
* FLASH on the Local Bus
*/
-#if 1
#define CONFIG_SYS_FLASH_CFI /* use the Common Flash Interface */
#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */
#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
#define CONFIG_FLASH_CFI_LEGACY
#define CONFIG_SYS_FLASH_LEGACY_512Kx16
-#else
-#define CONFIG_SYS_NO_FLASH
-#endif
#define CONFIG_SYS_FLASH_BASE 0xFE000000 /* FLASH base address */
#define CONFIG_SYS_FLASH_SIZE 8 /* FLASH size is up to 8M */
@@ -341,6 +339,22 @@
#define CONFIG_SYS_I2C_IHS_SPEED_3 50000
#define CONFIG_SYS_I2C_IHS_SLAVE_3 0x7F
+#ifdef CONFIG_STRIDER_CON_DP
+#define CONFIG_SYS_I2C_IHS_DUAL
+#define CONFIG_SYS_I2C_IHS_CH0_1
+#define CONFIG_SYS_I2C_IHS_SPEED_0_1 50000
+#define CONFIG_SYS_I2C_IHS_SLAVE_0_1 0x7F
+#define CONFIG_SYS_I2C_IHS_CH1_1
+#define CONFIG_SYS_I2C_IHS_SPEED_1_1 50000
+#define CONFIG_SYS_I2C_IHS_SLAVE_1_1 0x7F
+#define CONFIG_SYS_I2C_IHS_CH2_1
+#define CONFIG_SYS_I2C_IHS_SPEED_2_1 50000
+#define CONFIG_SYS_I2C_IHS_SLAVE_2_1 0x7F
+#define CONFIG_SYS_I2C_IHS_CH3_1
+#define CONFIG_SYS_I2C_IHS_SPEED_3_1 50000
+#define CONFIG_SYS_I2C_IHS_SLAVE_3_1 0x7F
+#endif
+
/*
* Software (bit-bang) I2C driver configuration
*/
@@ -357,7 +371,7 @@
#define I2C_SOFT_DECLARATIONS4
#define CONFIG_SYS_I2C_SOFT_SPEED_4 50000
#define CONFIG_SYS_I2C_SOFT_SLAVE_4 0x7F
-#ifdef CONFIG_STRIDER_CON
+#if defined(CONFIG_STRIDER_CON) || defined(CONFIG_STRIDER_CON_DP)
#define I2C_SOFT_DECLARATIONS5
#define CONFIG_SYS_I2C_SOFT_SPEED_5 50000
#define CONFIG_SYS_I2C_SOFT_SLAVE_5 0x7F
@@ -371,6 +385,20 @@
#define CONFIG_SYS_I2C_SOFT_SPEED_8 50000
#define CONFIG_SYS_I2C_SOFT_SLAVE_8 0x7F
#endif
+#ifdef CONFIG_STRIDER_CON_DP
+#define I2C_SOFT_DECLARATIONS9
+#define CONFIG_SYS_I2C_SOFT_SPEED_9 50000
+#define CONFIG_SYS_I2C_SOFT_SLAVE_9 0x7F
+#define I2C_SOFT_DECLARATIONS10
+#define CONFIG_SYS_I2C_SOFT_SPEED_10 50000
+#define CONFIG_SYS_I2C_SOFT_SLAVE_10 0x7F
+#define I2C_SOFT_DECLARATIONS11
+#define CONFIG_SYS_I2C_SOFT_SPEED_11 50000
+#define CONFIG_SYS_I2C_SOFT_SLAVE_11 0x7F
+#define I2C_SOFT_DECLARATIONS12
+#define CONFIG_SYS_I2C_SOFT_SPEED_12 50000
+#define CONFIG_SYS_I2C_SOFT_SLAVE_12 0x7F
+#endif
#ifdef CONFIG_STRIDER_CON
#define CONFIG_SYS_ICS8N3QV01_I2C {5, 6, 7, 8}
@@ -379,6 +407,13 @@
#define CONFIG_SYS_DP501_I2C {1, 2, 3, 4}
#define CONFIG_STRIDER_FANS { {10, 0x4c}, {11, 0x4c}, \
{12, 0x4c} }
+#elif defined(CONFIG_STRIDER_CON_DP)
+#define CONFIG_SYS_ICS8N3QV01_I2C {13, 14, 15, 16, 17, 18, 19, 20}
+#define CONFIG_SYS_CH7301_I2C {1, 3, 5, 7}
+#define CONFIG_SYS_ADV7611_I2C {1, 3, 5, 7}
+#define CONFIG_SYS_DP501_I2C {1, 3, 5, 7, 2, 4, 6, 8}
+#define CONFIG_STRIDER_FANS { {10, 0x4c}, {11, 0x4c}, \
+ {12, 0x4c} }
#else
#define CONFIG_SYS_CH7301_I2C {1, 2, 3, 4}
#define CONFIG_SYS_ADV7611_I2C {1, 2, 3, 4}
@@ -391,6 +426,8 @@
void fpga_gpio_set(unsigned int bus, int pin);
void fpga_gpio_clear(unsigned int bus, int pin);
int fpga_gpio_get(unsigned int bus, int pin);
+void fpga_control_set(unsigned int bus, int pin);
+void fpga_control_clear(unsigned int bus, int pin);
#endif
#ifdef CONFIG_STRIDER_CON
@@ -398,12 +435,28 @@ int fpga_gpio_get(unsigned int bus, int pin);
#define I2C_SCL_GPIO ((I2C_ADAP_HWNR > 3) ? 0x0100 : 0x0020)
#define I2C_FPGA_IDX ((I2C_ADAP_HWNR > 3) ? \
(I2C_ADAP_HWNR - 4) : I2C_ADAP_HWNR)
+#elif defined(CONFIG_STRIDER_CON_DP)
+#define I2C_SDA_GPIO ((I2C_ADAP_HWNR > 3) ? 0x0040 : 0x0200)
+#define I2C_SCL_GPIO ((I2C_ADAP_HWNR > 3) ? 0x0020 : 0x0100)
+#define I2C_FPGA_IDX (I2C_ADAP_HWNR % 4)
#else
#define I2C_SDA_GPIO 0x0040
#define I2C_SCL_GPIO 0x0020
#define I2C_FPGA_IDX I2C_ADAP_HWNR
#endif
+
+#ifdef CONFIG_STRIDER_CON_DP
+#define I2C_ACTIVE \
+ do { \
+ if (I2C_ADAP_HWNR > 7) \
+ fpga_control_set(I2C_FPGA_IDX, 0x0004); \
+ else \
+ fpga_control_clear(I2C_FPGA_IDX, 0x0004); \
+ } while (0)
+#else
#define I2C_ACTIVE { }
+#endif
+
#define I2C_TRISTATE { }
#define I2C_READ \
(fpga_gpio_get(I2C_FPGA_IDX, I2C_SDA_GPIO) ? 1 : 0)
@@ -436,6 +489,10 @@ int fpga_gpio_get(unsigned int bus, int pin);
#define CONFIG_SYS_DP501_DIFFERENTIAL
#define CONFIG_SYS_DP501_VCAPCTRL0 0x01 /* DDR mode 0, DE for H/VSYNC */
+#ifdef CONFIG_STRIDER_CON_DP
+#define CONFIG_SYS_OSD_DH
+#endif
+
/*
* General PCI
* Addresses are mapped 1-1.