diff options
| author | Marek Vasut <marex@denx.de> | 2015-08-19 23:23:53 +0200 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2015-09-04 11:54:20 +0200 |
| commit | 0c745d005ac309aeb528f68c2f8516026591ed6d (patch) | |
| tree | 7209748048adadfbbbd0a0b05956c8c595d30e0b /include/configs/socfpga_common.h | |
| parent | dfd3dff50acc3b169787f024188fa5f7276e10d1 (diff) | |
| download | u-boot-0c745d005ac309aeb528f68c2f8516026591ed6d.tar.gz | |
arm: socfpga: Zap OF_CONTROL checks, it's always enabled
The CONFIG_OF_CONTROL and CONFIG_SPL_OF_CONTROL is always enabled
on Altera SoCFPGA, remove the unnecessary checks.
Signed-off-by: Marek Vasut <marex@denx.de>
Diffstat (limited to 'include/configs/socfpga_common.h')
| -rw-r--r-- | include/configs/socfpga_common.h | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index c64c7ed420..38ae763653 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -192,7 +192,6 @@ unsigned int cm_get_l4_sp_clk_hz(void); /* * QSPI support */ -#ifdef CONFIG_OF_CONTROL /* QSPI is controlled via DT */ #define CONFIG_CADENCE_QSPI /* Enable multiple SPI NOR flash manufacturers */ #define CONFIG_SPI_FLASH_STMICRO /* Micron/Numonyx flash */ @@ -212,12 +211,12 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #define CONFIG_CQSPI_DECODER 0 #define CONFIG_CMD_SF #define CONFIG_SPI_FLASH_BAR -#endif -#if CONFIG_IS_ENABLED(OF_CONTROL) /* DW SPI is controlled via DT */ +/* + * Designware SPI support + */ #define CONFIG_DESIGNWARE_SPI #define CONFIG_CMD_SPI -#endif /* * Serial Driver |