diff options
| author | Marek Vasut <marex@denx.de> | 2015-07-20 05:48:37 +0200 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2015-08-08 14:14:09 +0200 |
| commit | ab48b19a660a81c907116514957a6db1cbb8dafa (patch) | |
| tree | bea880d455a148ee7e5983d8cc9cb4f2f430c01a /include/configs/socfpga_common.h | |
| parent | cbc9544d275c3964db0bd7b7e510be9172b43cb8 (diff) | |
| download | u-boot-ab48b19a660a81c907116514957a6db1cbb8dafa.tar.gz | |
arm: socfpga: config: Enable CONFIG_SPI_FLASH_BAR
This is needed to access broken (read: Micron) SPI flashes which
are larger than 16 MiB and don't correctly support 4-byte addressing.
Signed-off-by: Marek Vasut <marex@denx.de>
Diffstat (limited to 'include/configs/socfpga_common.h')
| -rw-r--r-- | include/configs/socfpga_common.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 24f2ec01b1..9ee4a75eb1 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -207,6 +207,7 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #endif #define CONFIG_CQSPI_DECODER 0 #define CONFIG_CMD_SF +#define CONFIG_SPI_FLASH_BAR #endif #ifdef CONFIG_OF_CONTROL /* DW SPI is controlled via DT */ |