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authorBin Meng <bmeng.cn@gmail.com>2015-05-07 21:34:08 +0800
committerSimon Glass <sjg@chromium.org>2015-06-04 02:39:38 -0600
commita65b25d148fb0a9ef7dd5fba4ae2709f5bcae0c6 (patch)
treeddbf28ac4f0a34f5c8b62b80f59a0a93db645a01 /include/configs/qemu-x86.h
parent238fe16c40f640e5b78828b21990a0565f408813 (diff)
downloadu-boot-a65b25d148fb0a9ef7dd5fba4ae2709f5bcae0c6.tar.gz
x86: Support QEMU x86 targets
This commit introduces the initial U-Boot support for QEMU x86 targets. U-Boot can boot from coreboot as a payload, or directly without coreboot. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Merged in patch 'x86: qemu: Add CMD_NET to qemu-x86_defconfig https://patchwork.ozlabs.org/patch/479745/
Diffstat (limited to 'include/configs/qemu-x86.h')
-rw-r--r--include/configs/qemu-x86.h57
1 files changed, 57 insertions, 0 deletions
diff --git a/include/configs/qemu-x86.h b/include/configs/qemu-x86.h
new file mode 100644
index 0000000000..463620d809
--- /dev/null
+++ b/include/configs/qemu-x86.h
@@ -0,0 +1,57 @@
+/*
+ * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/*
+ * board/config.h - configuration options, board specific
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#include <configs/x86-common.h>
+
+#define CONFIG_SYS_MONITOR_LEN (1 << 20)
+
+#define CONFIG_NR_DRAM_BANKS 1
+
+#define CONFIG_X86_SERIAL
+
+#define CONFIG_PCI_MEM_BUS 0xc0000000
+#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
+#define CONFIG_PCI_MEM_SIZE 0x10000000
+
+#define CONFIG_PCI_PREF_BUS 0xd0000000
+#define CONFIG_PCI_PREF_PHYS CONFIG_PCI_PREF_BUS
+#define CONFIG_PCI_PREF_SIZE 0x10000000
+
+#define CONFIG_PCI_IO_BUS 0x2000
+#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
+#define CONFIG_PCI_IO_SIZE 0xe000
+
+#define CONFIG_PCI_PNP
+#define CONFIG_E1000
+
+#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial\0" \
+ "stdout=serial\0" \
+ "stderr=serial\0"
+
+#define CONFIG_SCSI_DEV_LIST \
+ {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371SB_1}
+
+/* GPIO is not supported */
+#undef CONFIG_INTEL_ICH6_GPIO
+#undef CONFIG_CMD_GPIO
+
+/* SPI is not supported */
+#undef CONFIG_ICH_SPI
+#undef CONFIG_ENV_IS_IN_SPI_FLASH
+#define CONFIG_ENV_IS_NOWHERE
+
+/* Video is not supported */
+#undef CONFIG_VIDEO
+#undef CONFIG_CFB_CONSOLE
+
+#endif /* __CONFIG_H */