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author | Bin Meng <bmeng.cn@gmail.com> | 2015-07-30 03:49:14 -0700 |
---|---|---|
committer | Simon Glass <sjg@chromium.org> | 2015-08-05 08:42:39 -0600 |
commit | 456ee909d63a35daa51b70231c4abffa4709e9f3 (patch) | |
tree | 28a7843c75ca798718a9b70906ac4b1250a4d297 /include/configs/minnowmax.h | |
parent | 1e7a04730426a96110989ed9c2bafb0d66ec2428 (diff) | |
download | u-boot-456ee909d63a35daa51b70231c4abffa4709e9f3.tar.gz |
x86: minnowmax: Remove smsc47x superio codes
On Intel BayTrail SoC, there is a legacy UART (I/O 0x3f8) integrated
into the SoC which is enabled by the FSP. Remove the smsc47x superio
initialization codes.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'include/configs/minnowmax.h')
-rw-r--r-- | include/configs/minnowmax.h | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/include/configs/minnowmax.h b/include/configs/minnowmax.h index 4781e792f9..655ce3d422 100644 --- a/include/configs/minnowmax.h +++ b/include/configs/minnowmax.h @@ -14,11 +14,9 @@ #include <configs/x86-common.h> #define CONFIG_SYS_MONITOR_LEN (1 << 20) -#define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_ARCH_EARLY_INIT_R #define CONFIG_X86_SERIAL -#define CONFIG_SMSC_LPC47M #define CONFIG_PCI_MEM_BUS 0xd0000000 #define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS |