diff options
| author | Alison Wang <b18965@freescale.com> | 2017-05-16 10:45:59 +0800 |
|---|---|---|
| committer | York Sun <york.sun@nxp.com> | 2017-05-23 09:51:28 -0700 |
| commit | 8104deb2d6b77d3793a66016bf993bccd8f6afe2 (patch) | |
| tree | bce7f38fb81f6b0e76d18eab02dbf082dc766281 /include/configs/ls1046a_common.h | |
| parent | a9a5cef391ed5b2e47ed02a8cecf0ab1a19fc76a (diff) | |
| download | u-boot-8104deb2d6b77d3793a66016bf993bccd8f6afe2.tar.gz | |
armv8: layerscape: Adjust memory mapping for Flash/SD card on LS1046A
This patch is to adjust the memory mapping for FLash/SD card on
LS1046AQDS and LS1046ARDB, such as FMAN firmware load address, U-Boot
start address on serial flash and environment address.
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'include/configs/ls1046a_common.h')
| -rw-r--r-- | include/configs/ls1046a_common.h | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index 80f8dc2cbb..47a544c90c 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -176,23 +176,23 @@ /* * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is * about 1MB (2048 blocks), Env is stored after the image, and the env size is - * 0x2000 (16 blocks), 8 + 2048 + 16 = 2072, enlarge it to 2080(0x820). + * 0x2000 (16 blocks), 8 + 2048 + 16 = 2072, enlarge it to 18432(0x4800). */ #define CONFIG_SYS_QE_FMAN_FW_IN_MMC -#define CONFIG_SYS_FMAN_FW_ADDR (512 * 0x820) +#define CONFIG_SYS_FMAN_FW_ADDR (512 * 0x4800) #elif defined(CONFIG_QSPI_BOOT) #define CONFIG_SYS_QE_FW_IN_SPIFLASH -#define CONFIG_SYS_FMAN_FW_ADDR 0x40300000 +#define CONFIG_SYS_FMAN_FW_ADDR 0x40900000 #define CONFIG_ENV_SPI_BUS 0 #define CONFIG_ENV_SPI_CS 0 #define CONFIG_ENV_SPI_MAX_HZ 1000000 #define CONFIG_ENV_SPI_MODE 0x03 #elif defined(CONFIG_NAND_BOOT) #define CONFIG_SYS_QE_FMAN_FW_IN_NAND -#define CONFIG_SYS_FMAN_FW_ADDR (6 * CONFIG_SYS_NAND_BLOCK_SIZE) +#define CONFIG_SYS_FMAN_FW_ADDR (72 * CONFIG_SYS_NAND_BLOCK_SIZE) #else #define CONFIG_SYS_QE_FMAN_FW_IN_NOR -#define CONFIG_SYS_FMAN_FW_ADDR 0x60300000 +#define CONFIG_SYS_FMAN_FW_ADDR 0x60900000 #endif #define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000 #define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) |