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authorTom Rini <trini@konsulko.com>2020-04-07 11:58:44 -0400
committerTom Rini <trini@konsulko.com>2020-04-07 17:13:35 -0400
commit1f47e2aca42c2e51ff3a7754c717ee13f568c721 (patch)
treeeca6cb5e551dbb75c2328b1dba3e7a2b8a77d327 /include/configs/ls1021atwr.h
parent2b18b89156335bf1f0d84f81d3597762bc48c61d (diff)
parent895a7866c20cf6c01779b5a60fbf2770b88930a4 (diff)
downloadu-boot-1f47e2aca42c2e51ff3a7754c717ee13f568c721.tar.gz
Merge tag 'xilinx-for-v2020.07' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into nextWIP/07Apr2020-next
Xilinx changes for v2020.07 common: - Align ENV_FAT_INTERFACE - Fix MAC address source print log - Improve based autodetection code xilinx: - Enable netconsole Microblaze: - Setup default ENV_OFFSET/ENV_SECT_SIZE Zynq: - Multiple DT updates/fixes - Use DEVICE_TREE environment variable for DTB selection - Switch to single zynq configuration - Enable NOR flash via DM - Minor SPL print removal - Enable i2c mux driver ZynqMP: - Print multiboot register - Enable cache commands in mini mtest - Multiple DT updates/fixes - Fix firmware probing when driver is not enabled - Specify 3rd backup RAM boot mode in SPL - Add SPL support for zcu102 v1.1 and zcu111 revA - Redesign debug uart enabling and psu_init delay - Enable full u-boot run from EL3 - Enable u-boot.itb generation without ATF with U-Boot in EL3 Versal: - Enable distro default - Enable others SPI flashes - Enable systems without DDR Drivers: - Gem: - Flush memory after freeing - Handle mdio bus separately - Watchdog: - Get rid of unused global data pointer - Enable window watchdog timer - Serial: - Change reinitialization logic in zynq serial driver Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'include/configs/ls1021atwr.h')
-rw-r--r--include/configs/ls1021atwr.h9
1 files changed, 3 insertions, 6 deletions
diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h
index 8e2784b14b..a6289850ca 100644
--- a/include/configs/ls1021atwr.h
+++ b/include/configs/ls1021atwr.h
@@ -297,9 +297,8 @@
#ifdef CONFIG_LPUART
#define CONFIG_EXTRA_ENV_SETTINGS \
- "bootargs=root=/dev/ram0 rw console=ttyLP0,115200\0" \
+ "bootargs=root=/dev/ram0 rw console=ttyLP0,115200 $othbootargs\0" \
"initrd_high=0xffffffff\0" \
- "fdt_high=0xffffffff\0" \
"fdt_addr=0x64f00000\0" \
"kernel_addr=0x65000000\0" \
"scriptaddr=0x80000000\0" \
@@ -313,7 +312,6 @@
"kernel_size=0x2800000\0" \
"kernel_addr_sd=0x8000\0" \
"kernel_size_sd=0x14000\0" \
- "$othbootargs\0" \
"othbootargs=cma=64M@0x0-0xb0000000\0" \
BOOTENV \
"boot_scripts=ls1021atwr_boot.scr\0" \
@@ -355,9 +353,8 @@
"$kernel_size && bootm $load_addr#$board\0"
#else
#define CONFIG_EXTRA_ENV_SETTINGS \
- "bootargs=root=/dev/ram0 rw console=ttyS0,115200\0" \
+ "bootargs=root=/dev/ram0 rw console=ttyS0,115200 $othbootargs\0" \
"initrd_high=0xffffffff\0" \
- "fdt_high=0xffffffff\0" \
"fdt_addr=0x64f00000\0" \
"kernel_addr=0x61000000\0" \
"kernelheader_addr=0x60800000\0" \
@@ -375,7 +372,6 @@
"kernel_size_sd=0x14000\0" \
"kernelhdr_addr_sd=0x4000\0" \
"kernelhdr_size_sd=0x10\0" \
- "$othbootargs\0" \
"othbootargs=cma=64M@0x0-0xb0000000\0" \
BOOTENV \
"boot_scripts=ls1021atwr_boot.scr\0" \
@@ -441,6 +437,7 @@
/*
* Miscellaneous configurable options
*/
+#define CONFIG_SYS_BOOTMAPSZ (256 << 20)
#define CONFIG_SYS_MEMTEST_START 0x80000000
#define CONFIG_SYS_MEMTEST_END 0x9fffffff