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author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2008-09-10 22:48:06 +0200 |
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committer | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2008-09-10 22:48:06 +0200 |
commit | 0e8d158664a913392cb01fb11a948d83f72e105e (patch) | |
tree | 9e0a45c86828b4549b77c7867320e867401d9c86 /include/configs/integratorcp.h | |
parent | 1ede78710c3bf9ad6f4a53aaddc3bcc86fedd9df (diff) | |
download | u-boot-0e8d158664a913392cb01fb11a948d83f72e105e.tar.gz |
rename CFG_ENV macros to CONFIG_ENV
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'include/configs/integratorcp.h')
-rw-r--r-- | include/configs/integratorcp.h | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/include/configs/integratorcp.h b/include/configs/integratorcp.h index d66ec3a194..6dbe4b307c 100644 --- a/include/configs/integratorcp.h +++ b/include/configs/integratorcp.h @@ -47,7 +47,7 @@ /* * Size of malloc() pool */ -#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024) +#define CFG_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ /* @@ -169,29 +169,29 @@ SIB at Block62 End Block62 address 0x24f80000 * Move up the U-Boot & monitor area if more flash is fitted. * If this U-Boot is to be run on Integrators with varying flash sizes, * drivers/mtd/cfi_flash.c::flash_init() can read the Integrator CP_FLASHPROG - * register and dynamically assign CFG_ENV_ADDR & CFG_MONITOR_BASE + * register and dynamically assign CONFIG_ENV_ADDR & CFG_MONITOR_BASE * - CFG_MONITOR_BASE is set to indicate that the environment is not * embedded in the boot monitor(s) area */ #if ( PHYS_FLASH_SIZE == 0x04000000 ) -#define CFG_ENV_ADDR 0x27F00000 +#define CONFIG_ENV_ADDR 0x27F00000 #define CFG_MONITOR_BASE 0x27F40000 #elif (PHYS_FLASH_SIZE == 0x02000000 ) -#define CFG_ENV_ADDR 0x25F00000 +#define CONFIG_ENV_ADDR 0x25F00000 #define CFG_MONITOR_BASE 0x25F40000 #else -#define CFG_ENV_ADDR 0x24F00000 +#define CONFIG_ENV_ADDR 0x24F00000 #define CFG_MONITOR_BASE 0x27F40000 #endif -#define CFG_ENV_SECT_SIZE 0x40000 /* 256KB */ -#define CFG_ENV_SIZE 8192 /* 8KB */ +#define CONFIG_ENV_SECT_SIZE 0x40000 /* 256KB */ +#define CONFIG_ENV_SIZE 8192 /* 8KB */ /*----------------------------------------------------------------------- * CP control registers */ |