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| author | Ruchika Gupta <ruchika.gupta@freescale.com> | 2014-10-15 11:35:31 +0530 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2014-10-16 14:17:21 -0700 |
| commit | 737537ef0c9622114cf1a48208abf048df1b2005 (patch) | |
| tree | 9005cf1d30a8c370c36bdb05e1b4fb95496f62a3 /include/configs/P2041RDB.h | |
| parent | b9eebfade974c86c8ddef64793649374c9876242 (diff) | |
| download | u-boot-737537ef0c9622114cf1a48208abf048df1b2005.tar.gz | |
mpc85xx: configs - Add hash command in freescale platforms
Enable CAAM in platforms supporting the hardware block.
Hash command enabled along with hardware accelerated support for
SHA-1 and SHA-256 for platforms which have CAAM block.
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'include/configs/P2041RDB.h')
| -rw-r--r-- | include/configs/P2041RDB.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 16f7525def..bab0e1e72f 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -49,6 +49,7 @@ #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS #define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */ +#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_PCI /* Enable PCI/PCIE */ #define CONFIG_PCIE1 /* PCIE controler 1 */ #define CONFIG_PCIE2 /* PCIE controler 2 */ @@ -647,6 +648,12 @@ unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_DOS_PARTITION #endif +/* Hash command with SHA acceleration supported in hardware */ +#ifdef CONFIG_FSL_CAAM +#define CONFIG_CMD_HASH +#define CONFIG_SHA_HW_ACCEL +#endif + /* * Miscellaneous configurable options */ |