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authorVictor Axelrod <victora@marvell.com>2018-08-29 11:56:13 +0300
committerStefan Roese <sr@denx.de>2018-09-19 09:02:34 +0200
commitac56a3b30cc74f2c9dd667705e756ff5f5aeda0f (patch)
tree80dd57d76210918851301c17f6823c660c7a9d24 /drivers
parentf3d235702de09622a542ba2830882d23e2dfee1f (diff)
downloadu-boot-ac56a3b30cc74f2c9dd667705e756ff5f5aeda0f.tar.gz
mtd: nand: pxa3xx: add support for 2KB 8-bit flash
Add support for 2KB page 8-bit ECC strength flash layout Signed-off-by: Victor Axelrod <victora@marvell.com> Reviewed-by: Igal Liberman <igall@marvell.com> Cc: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/mtd/nand/pxa3xx_nand.c27
1 files changed, 27 insertions, 0 deletions
diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
index 2278fffaca..5a84924f7a 100644
--- a/drivers/mtd/nand/pxa3xx_nand.c
+++ b/drivers/mtd/nand/pxa3xx_nand.c
@@ -304,6 +304,20 @@ static struct nand_ecclayout ecc_layout_2KB_bch4bit = {
.oobfree = { {2, 30} }
};
+static struct nand_ecclayout ecc_layout_2KB_bch8bit = {
+ .eccbytes = 64,
+ .eccpos = {
+ 64, 65, 66, 67, 68, 69, 70, 71,
+ 72, 73, 74, 75, 76, 77, 78, 79,
+ 80, 81, 82, 83, 84, 85, 86, 87,
+ 88, 89, 90, 91, 92, 93, 94, 95,
+ 96, 97, 98, 99, 100, 101, 102, 103,
+ 104, 105, 106, 107, 108, 109, 110, 111,
+ 112, 113, 114, 115, 116, 117, 118, 119,
+ 120, 121, 122, 123, 124, 125, 126, 127},
+ .oobfree = { {1, 4}, {6, 26} }
+};
+
static struct nand_ecclayout ecc_layout_4KB_bch4bit = {
.eccbytes = 64,
.eccpos = {
@@ -1413,6 +1427,19 @@ static int pxa_ecc_init(struct pxa3xx_nand_info *info,
ecc->size = info->chunk_size;
ecc->layout = &ecc_layout_4KB_bch8bit;
ecc->strength = 16;
+ } else if (strength == 8 && ecc_stepsize == 512 && page_size == 2048) {
+ info->ecc_bch = 1;
+ info->nfullchunks = 1;
+ info->ntotalchunks = 2;
+ info->chunk_size = 1024;
+ info->spare_size = 0;
+ info->last_chunk_size = 1024;
+ info->last_spare_size = 64;
+ info->ecc_size = 32;
+ ecc->mode = NAND_ECC_HW;
+ ecc->size = info->chunk_size;
+ ecc->layout = &ecc_layout_2KB_bch8bit;
+ ecc->strength = 16;
} else {
dev_err(&info->pdev->dev,
"ECC strength %d at page size %d is not supported\n",