diff options
| author | Christophe Kerello <christophe.kerello@st.com> | 2018-07-09 15:32:37 +0200 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2018-07-23 14:33:21 -0400 |
| commit | ceff933e1e359e03bff17b22c0599ee29c4c5924 (patch) | |
| tree | 228b62f80854bf31670fa9c82d205408c5135b05 /drivers | |
| parent | f53424e65065c355527f778f65006ff608bb2e6a (diff) | |
| download | u-boot-ceff933e1e359e03bff17b22c0599ee29c4c5924.tar.gz | |
spi: stm32_qspi: assign functional operation mode in _stm32_qspi_gen_ccr
This patch assigns the functional operation mode in _stm32_qspi_gen_ccr
function.
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/spi/stm32_qspi.c | 17 |
1 files changed, 8 insertions, 9 deletions
diff --git a/drivers/spi/stm32_qspi.c b/drivers/spi/stm32_qspi.c index f6cc353363..81b84625ba 100644 --- a/drivers/spi/stm32_qspi.c +++ b/drivers/spi/stm32_qspi.c @@ -220,7 +220,7 @@ static void _stm32_qspi_set_cs(struct stm32_qspi_priv *priv, unsigned int cs) cs ? STM32_QSPI_CR_FSEL : 0); } -static unsigned int _stm32_qspi_gen_ccr(struct stm32_qspi_priv *priv) +static unsigned int _stm32_qspi_gen_ccr(struct stm32_qspi_priv *priv, u8 fmode) { unsigned int ccr_reg = 0; u8 imode, admode, dmode; @@ -258,8 +258,11 @@ static unsigned int _stm32_qspi_gen_ccr(struct stm32_qspi_priv *priv) << STM32_QSPI_CCR_ADSIZE_SHIFT); ccr_reg |= (admode << STM32_QSPI_CCR_ADMODE_SHIFT); } + + ccr_reg |= (fmode << STM32_QSPI_CCR_FMODE_SHIFT); ccr_reg |= (imode << STM32_QSPI_CCR_IMODE_SHIFT); ccr_reg |= cmd; + return ccr_reg; } @@ -272,8 +275,7 @@ static void _stm32_qspi_enable_mmap(struct stm32_qspi_priv *priv, | CMD_HAS_DUMMY; priv->dummycycles = flash->dummy_byte * 8; - ccr_reg = _stm32_qspi_gen_ccr(priv); - ccr_reg |= (STM32_QSPI_CCR_MEM_MAP << STM32_QSPI_CCR_FMODE_SHIFT); + ccr_reg = _stm32_qspi_gen_ccr(priv, STM32_QSPI_CCR_MEM_MAP); _stm32_qspi_wait_for_not_busy(priv); @@ -359,9 +361,8 @@ static int _stm32_qspi_xfer(struct stm32_qspi_priv *priv, } if (flags & SPI_XFER_END) { - ccr_reg = _stm32_qspi_gen_ccr(priv); - ccr_reg |= STM32_QSPI_CCR_IND_WRITE - << STM32_QSPI_CCR_FMODE_SHIFT; + ccr_reg = _stm32_qspi_gen_ccr(priv, + STM32_QSPI_CCR_IND_WRITE); _stm32_qspi_wait_for_not_busy(priv); @@ -392,9 +393,7 @@ static int _stm32_qspi_xfer(struct stm32_qspi_priv *priv, } } } else if (din) { - ccr_reg = _stm32_qspi_gen_ccr(priv); - ccr_reg |= STM32_QSPI_CCR_IND_READ - << STM32_QSPI_CCR_FMODE_SHIFT; + ccr_reg = _stm32_qspi_gen_ccr(priv, STM32_QSPI_CCR_IND_READ); _stm32_qspi_wait_for_not_busy(priv); |