dm: test: clk: add the test for the ccf gated clock

Unlike the other clock types, in the case of the gated clock, a new
driver has been developed which does not use the registering routine
provided by the common clock framework.
The addition of the ecspi0 clock to sandbox therefore allows testing
the ccf gate clock.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>

1 files changed, 4 insertions, 0 deletions

diff --git a/drivers/clk/clk_sandbox_ccf.c b/drivers/clk/clk_sandbox_ccf.c
index 0619d04f0e..e90b860257 100644
--- a/drivers/clk/clk_sandbox_ccf.c
+++ b/drivers/clk/clk_sandbox_ccf.c
@@ -250,6 +250,10 @@ static int sandbox_clk_ccf_probe(struct udevice *dev)
 	clk_dm(SANDBOX_CLK_ECSPI_ROOT,
 	       sandbox_clk_divider("ecspi_root", "pll3_60m", &reg, 19, 6));
 
+	reg = 0;
+	clk_dm(SANDBOX_CLK_ECSPI0,
+	       sandbox_clk_gate("ecspi0", "ecspi_root", &reg, 0, 0));
+
 	clk_dm(SANDBOX_CLK_ECSPI1,
 	       sandbox_clk_gate2("ecspi1", "ecspi_root", base + 0x6c, 0));