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authorStefan Roese <sr@denx.de>2020-07-23 16:26:07 +0200
committerStefan Roese <sr@denx.de>2020-08-25 05:41:09 +0200
commit3b7cd265b82760d27b5665840ed4807fd9e2cb42 (patch)
tree9542e8c43082e200927c7a8b6ba1d0d7cf8e20f1 /drivers
parent68f81b857563e8f739323385795f1e99b3d2e598 (diff)
downloadu-boot-3b7cd265b82760d27b5665840ed4807fd9e2cb42.tar.gz
pci: pci-uclass: Remove #ifdef CONFIG_NR_DRAM_BANKS as its always set
Since the migration to Kconfig, CONFIG_NR_DRAM_BANKS is configured for all boards. Hence we can remove the conditional compilation and the code path that will never get compiled. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Cc: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/pci/pci-uclass.c17
1 files changed, 1 insertions, 16 deletions
diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
index 40cc9f1090..601557a875 100644
--- a/drivers/pci/pci-uclass.c
+++ b/drivers/pci/pci-uclass.c
@@ -871,6 +871,7 @@ static void decode_regions(struct pci_controller *hose, ofnode parent_node,
ofnode node)
{
int pci_addr_cells, addr_cells, size_cells;
+ struct bd_info *bd = gd->bd;
int cells_per_record;
const u32 *prop;
int len;
@@ -938,9 +939,6 @@ static void decode_regions(struct pci_controller *hose, ofnode parent_node,
}
/* Add a region for our local memory */
-#ifdef CONFIG_NR_DRAM_BANKS
- struct bd_info *bd = gd->bd;
-
if (!bd)
return;
@@ -958,19 +956,6 @@ static void decode_regions(struct pci_controller *hose, ofnode parent_node,
PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
}
}
-#else
- phys_addr_t base = 0, size;
-
- size = gd->ram_size;
-#ifdef CONFIG_SYS_SDRAM_BASE
- base = CONFIG_SYS_SDRAM_BASE;
-#endif
- if (gd->pci_ram_top && gd->pci_ram_top < base + size)
- size = gd->pci_ram_top - base;
- if (size)
- pci_set_region(hose->regions + hose->region_count++, base,
- base, size, PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
-#endif
return;
}