diff options
| author | Simon Glass <sjg@chromium.org> | 2017-06-07 21:11:48 -0600 |
|---|---|---|
| committer | Tom Warren <twarren@nvidia.com> | 2017-06-20 09:47:59 -0700 |
| commit | 542b5f85674b297f0d9aee7e6e50801f6c24bb45 (patch) | |
| tree | ac38c4abc9bf273f142fc5d7c3516a139c77d017 /drivers | |
| parent | e2351d5cf1e97408b4c52bafeaa85e0ca85c920c (diff) | |
| download | u-boot-542b5f85674b297f0d9aee7e6e50801f6c24bb45.tar.gz | |
tegra: mmc: Set the bus width correctly
The driver currently does not reset bit 5 of the hostctl register even if
the MMC stack requests it. Then means that once a bus width of 8 is
selected it is not possible to change it back to 1. This breaks
'mmc rescan' which needs to start off with a bus width of 1.
The problem was surfaced by enabling CONFIG_DM_MMC_OPS on tegra. Without
this option the MMC stack fully reinits the driver on a 'mmc rescan'.
But with this option driver model does not re-probe a driver once it has
been probed once.
Fix the driver to honour the request.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Peter Chubb <peter.chubb@data61.csiro.au>
Tested-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/mmc/tegra_mmc.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/mmc/tegra_mmc.c b/drivers/mmc/tegra_mmc.c index 338e42b528..7d945a172e 100644 --- a/drivers/mmc/tegra_mmc.c +++ b/drivers/mmc/tegra_mmc.c @@ -438,7 +438,7 @@ static int tegra_mmc_set_ios(struct udevice *dev) else if (mmc->bus_width == 4) ctrl |= (1 << 1); else - ctrl &= ~(1 << 1); + ctrl &= ~(1 << 1 | 1 << 5); writeb(ctrl, &priv->reg->hostctl); debug("mmc_set_ios: hostctl = %08X\n", ctrl); |