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| author | Michal Simek <michal.simek@xilinx.com> | 2018-06-30 08:15:17 +0530 |
|---|---|---|
| committer | Jagan Teki <jagan@amarulasolutions.com> | 2018-07-16 14:01:20 +0530 |
| commit | 4e7c1a26518fc4332f23c3ee001e10a31555b2b1 (patch) | |
| tree | 31a6d0d1449a696307744137ea83826033804e51 /drivers/spi | |
| parent | 5e9a9645816edcc68c09729f257e0c863292bf26 (diff) | |
| download | u-boot-4e7c1a26518fc4332f23c3ee001e10a31555b2b1.tar.gz | |
spi: xilinx: Read reg base address from DTS file
This patch added support to read register base address from DTS file.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Diffstat (limited to 'drivers/spi')
| -rw-r--r-- | drivers/spi/xilinx_spi.c | 7 |
1 files changed, 1 insertions, 6 deletions
diff --git a/drivers/spi/xilinx_spi.c b/drivers/spi/xilinx_spi.c index 8f0f32f68f..cc5ac5183f 100644 --- a/drivers/spi/xilinx_spi.c +++ b/drivers/spi/xilinx_spi.c @@ -77,10 +77,6 @@ #define CONFIG_XILINX_SPI_IDLE_VAL GENMASK(7, 0) #endif -#ifndef CONFIG_SYS_XILINX_SPI_LIST -#define CONFIG_SYS_XILINX_SPI_LIST { CONFIG_SYS_SPI_BASE } -#endif - /* xilinx spi register set */ struct xilinx_spi_regs { u32 __space0__[7]; @@ -107,13 +103,12 @@ struct xilinx_spi_priv { unsigned int mode; }; -static unsigned long xilinx_spi_base_list[] = CONFIG_SYS_XILINX_SPI_LIST; static int xilinx_spi_probe(struct udevice *bus) { struct xilinx_spi_priv *priv = dev_get_priv(bus); struct xilinx_spi_regs *regs = priv->regs; - priv->regs = (struct xilinx_spi_regs *)xilinx_spi_base_list[bus->seq]; + priv->regs = (struct xilinx_spi_regs *)devfdt_get_addr(bus); writel(SPISSR_RESET_VALUE, ®s->srr); |