diff options
| author | Simon Glass <sjg@chromium.org> | 2020-05-10 11:40:13 -0600 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2020-05-18 21:19:23 -0400 |
| commit | cd93d625fd751d55c729c78b10f82109d56a5f1d (patch) | |
| tree | 158fd30f3d06142f6a99cbae6ed8ccb0f3be567b /drivers/ram | |
| parent | f09f1ecbe77863ecefe586ccd6000064b49105a3 (diff) | |
| download | u-boot-cd93d625fd751d55c729c78b10f82109d56a5f1d.tar.gz | |
common: Drop linux/bitops.h from common headerWIP/2020-05-18-reduce-size-of-common.h
Move this uncommon header out of the common header.
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'drivers/ram')
| -rw-r--r-- | drivers/ram/imxrt_sdram.c | 1 | ||||
| -rw-r--r-- | drivers/ram/k3-am654-ddrss.h | 1 | ||||
| -rw-r--r-- | drivers/ram/mediatek/ddr3-mt7629.c | 1 | ||||
| -rw-r--r-- | drivers/ram/mpc83xx_sdram.c | 1 | ||||
| -rw-r--r-- | drivers/ram/rockchip/dmc-rk3368.c | 1 | ||||
| -rw-r--r-- | drivers/ram/stm32_sdram.c | 1 | ||||
| -rw-r--r-- | drivers/ram/stm32mp1/stm32mp1_ddr.c | 1 | ||||
| -rw-r--r-- | drivers/ram/stm32mp1/stm32mp1_ddr_regs.h | 1 |
8 files changed, 8 insertions, 0 deletions
diff --git a/drivers/ram/imxrt_sdram.c b/drivers/ram/imxrt_sdram.c index 80fcb7e56e..765a2141d1 100644 --- a/drivers/ram/imxrt_sdram.c +++ b/drivers/ram/imxrt_sdram.c @@ -11,6 +11,7 @@ #include <log.h> #include <ram.h> #include <asm/io.h> +#include <linux/bitops.h> #include <linux/delay.h> #include <linux/err.h> diff --git a/drivers/ram/k3-am654-ddrss.h b/drivers/ram/k3-am654-ddrss.h index 94a7c91b2b..c87f186291 100644 --- a/drivers/ram/k3-am654-ddrss.h +++ b/drivers/ram/k3-am654-ddrss.h @@ -11,6 +11,7 @@ #define __K3_AM654_DDRSS_H /* DDRSS subsystem wrapper logic registers */ +#include <linux/bitops.h> #define DDRSS_SS_ID_REV_REG 0x00000000 #define DDRSS_SS_CTL_REG 0x00000004 #define DDRSS_V2H_CTL_REG 0x00000020 diff --git a/drivers/ram/mediatek/ddr3-mt7629.c b/drivers/ram/mediatek/ddr3-mt7629.c index 6b4296d714..b3a68cb078 100644 --- a/drivers/ram/mediatek/ddr3-mt7629.c +++ b/drivers/ram/mediatek/ddr3-mt7629.c @@ -12,6 +12,7 @@ #include <dm.h> #include <ram.h> #include <asm/io.h> +#include <linux/bitops.h> #include <linux/delay.h> /* EMI */ diff --git a/drivers/ram/mpc83xx_sdram.c b/drivers/ram/mpc83xx_sdram.c index e97467029f..a226bac2cc 100644 --- a/drivers/ram/mpc83xx_sdram.c +++ b/drivers/ram/mpc83xx_sdram.c @@ -9,6 +9,7 @@ #include <init.h> #include <log.h> #include <ram.h> +#include <asm/bitops.h> #include <dt-bindings/memory/mpc83xx-sdram.h> DECLARE_GLOBAL_DATA_PTR; diff --git a/drivers/ram/rockchip/dmc-rk3368.c b/drivers/ram/rockchip/dmc-rk3368.c index 31a3c83b03..92457a1fa4 100644 --- a/drivers/ram/rockchip/dmc-rk3368.c +++ b/drivers/ram/rockchip/dmc-rk3368.c @@ -20,6 +20,7 @@ #include <asm/arch-rockchip/ddr_rk3368.h> #include <asm/arch-rockchip/sdram.h> #include <asm/arch-rockchip/sdram_rk3288.h> +#include <linux/bitops.h> #include <linux/delay.h> #include <linux/err.h> diff --git a/drivers/ram/stm32_sdram.c b/drivers/ram/stm32_sdram.c index 1894a60f1a..3fddf4df96 100644 --- a/drivers/ram/stm32_sdram.c +++ b/drivers/ram/stm32_sdram.c @@ -12,6 +12,7 @@ #include <ram.h> #include <asm/io.h> #include <dm/device_compat.h> +#include <linux/bitops.h> #include <linux/delay.h> #define MEM_MODE_MASK GENMASK(2, 0) diff --git a/drivers/ram/stm32mp1/stm32mp1_ddr.c b/drivers/ram/stm32mp1/stm32mp1_ddr.c index f523dc8ea2..bf3a4c97a4 100644 --- a/drivers/ram/stm32mp1/stm32mp1_ddr.c +++ b/drivers/ram/stm32mp1/stm32mp1_ddr.c @@ -11,6 +11,7 @@ #include <timer.h> #include <asm/io.h> #include <asm/arch/ddr.h> +#include <linux/bitops.h> #include <linux/delay.h> #include <linux/iopoll.h> #include "stm32mp1_ddr.h" diff --git a/drivers/ram/stm32mp1/stm32mp1_ddr_regs.h b/drivers/ram/stm32mp1/stm32mp1_ddr_regs.h index afd93c518e..3c8885a965 100644 --- a/drivers/ram/stm32mp1/stm32mp1_ddr_regs.h +++ b/drivers/ram/stm32mp1/stm32mp1_ddr_regs.h @@ -7,6 +7,7 @@ #define _RAM_STM32MP1_DDR_REGS_H /* DDR3/LPDDR2/LPDDR3 Controller (DDRCTRL) registers */ +#include <linux/bitops.h> struct stm32mp1_ddrctl { u32 mstr ; /* 0x0 Master*/ u32 stat; /* 0x4 Operating Mode Status*/ |