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authorVikas Manocha <vikas.manocha@st.com>2017-04-10 15:02:59 -0700
committerTom Rini <trini@konsulko.com>2017-05-08 11:57:21 -0400
commit280057bd7dd623420b2d8b383fe5bbe26820bc93 (patch)
tree14b79f1fdbb08d299ec1e434e359e73e17761e03 /drivers/pinctrl
parentd33a6a2f064a5dabfc277d5345aa03a9fbce4680 (diff)
downloadu-boot-280057bd7dd623420b2d8b383fe5bbe26820bc93.tar.gz
stm32f7: use stm32f7 gpio driver supporting driver model
With this gpio driver supporting DM, there is no need to enable clocks for different gpios (for pin muxing) in the board specific code. Need to increase the allocatable area required before relocation from 0x400 to 0xC00 becuase of 10 new gpio devices(& new gpio class) added in device tree. Signed-off-by: Vikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'drivers/pinctrl')
-rw-r--r--drivers/pinctrl/pinctrl_stm32.c9
1 files changed, 7 insertions, 2 deletions
diff --git a/drivers/pinctrl/pinctrl_stm32.c b/drivers/pinctrl/pinctrl_stm32.c
index 0e74d051c3..01f0429a39 100644
--- a/drivers/pinctrl/pinctrl_stm32.c
+++ b/drivers/pinctrl/pinctrl_stm32.c
@@ -121,11 +121,16 @@ static int stm32_pinctrl_set_state_simple(struct udevice *dev,
if (len < 0)
return -EINVAL;
for (i = 0; i < len; i++) {
+ struct gpio_desc desc;
debug("%s: pinmux = %x\n", __func__, *(pin_mux + i));
prep_gpio_dsc(&gpio_dsc, *(pin_mux + i));
prep_gpio_ctl(&gpio_ctl, *(pin_mux + i), args.node);
-
- rv = stm32_gpio_config(&gpio_dsc, &gpio_ctl);
+ rv = uclass_get_device_by_seq(UCLASS_GPIO,
+ gpio_dsc.port, &desc.dev);
+ if (rv)
+ return rv;
+ desc.offset = gpio_dsc.pin;
+ rv = stm32_gpio_config(&desc, &gpio_ctl);
debug("%s: rv = %d\n\n", __func__, rv);
if (rv)
return rv;