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| author | Tom Rini <trini@konsulko.com> | 2018-08-13 12:34:55 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2018-08-13 12:34:55 -0400 |
| commit | b8a1f47be3ab050090cd8625e580cf3c63e3ff53 (patch) | |
| tree | f4ed93eeb2de63040779de54bc4e91fefdcc2a31 /drivers/pci | |
| parent | 8fee226da36f799e69041b2ab381064693199c7f (diff) | |
| parent | 9add5a4b75a01cc5f69b9d5f6b30443f2088d7d8 (diff) | |
| download | u-boot-b8a1f47be3ab050090cd8625e580cf3c63e3ff53.tar.gz | |
Merge git://git.denx.de/u-boot-fsl-qoriq
Diffstat (limited to 'drivers/pci')
| -rw-r--r-- | drivers/pci/fsl_pci_init.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/pci/fsl_pci_init.c b/drivers/pci/fsl_pci_init.c index 375b8549c5..b4c8556686 100644 --- a/drivers/pci/fsl_pci_init.c +++ b/drivers/pci/fsl_pci_init.c @@ -321,6 +321,12 @@ void fsl_pci_init(struct pci_controller *hose, struct fsl_pci_info *pci_info) pci_setup_indirect(hose, cfg_addr, cfg_data); +#ifdef PEX_CCB_DIV + /* Configure the PCIE controller core clock ratio */ + pci_hose_write_config_dword(hose, dev, 0x440, + ((gd->bus_clk / 1000000) * + (16 / PEX_CCB_DIV)) / 333); +#endif block_rev = in_be32(&pci->block_rev1); if (PEX_IP_BLK_REV_2_2 <= block_rev) { pi = &pci->pit[2]; /* 0xDC0 */ |