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| author | Tom Rini <trini@konsulko.com> | 2018-09-27 08:29:10 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2018-09-27 08:29:10 -0400 |
| commit | bbef20d479441b01d62252cf127498c58078b2c3 (patch) | |
| tree | 7818d7df29c6147d5270c0ee0a6ff1645917d1b6 /drivers/net | |
| parent | 0ae8dcfef7c890330c62bb34c724126ffc169bef (diff) | |
| parent | 3888c8d1979289efe685fe29276aed4d4b685975 (diff) | |
| download | u-boot-bbef20d479441b01d62252cf127498c58078b2c3.tar.gz | |
Merge tag 'xilinx-for-v2018.11' of git://git.denx.de/u-boot-microblaze
Xilinx changes for v2018.11
- Handle BOARD_LATE_INIT via Kconfig
SPL:
- Enable GZIP for all partitions types(not only for kernel)
ZynqMP:
- Rearrange pmufw version handling
- Support newer PMUFW with improved fpga load sequence
Zynq:
- Cleanup config file
- Simplify zybo config by enabling option via Kconfig
net:
- Fix gems max-speed property reading
- Enable support for fixed-link phys
Diffstat (limited to 'drivers/net')
| -rw-r--r-- | drivers/net/zynq_gem.c | 16 |
1 files changed, 9 insertions, 7 deletions
diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index 68d1c2fcea..e22d048e8f 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -699,14 +699,17 @@ static int zynq_gem_ofdata_to_platdata(struct udevice *dev) /* Hardcode for now */ priv->phyaddr = -1; - if (dev_read_phandle_with_args(dev, "phy-handle", NULL, 0, 0, - &phandle_args)) { - debug("phy-handle does not exist %s\n", dev->name); - return -ENOENT; + if (!dev_read_phandle_with_args(dev, "phy-handle", NULL, 0, 0, + &phandle_args)) { + debug("phy-handle does exist %s\n", dev->name); + priv->phyaddr = ofnode_read_u32_default(phandle_args.node, + "reg", -1); + priv->phy_of_node = phandle_args.node; + priv->max_speed = ofnode_read_u32_default(phandle_args.node, + "max-speed", + SPEED_1000); } - priv->phyaddr = ofnode_read_u32_default(phandle_args.node, "reg", -1); - priv->phy_of_node = phandle_args.node; phy_mode = dev_read_prop(dev, "phy-mode", NULL); if (phy_mode) pdata->phy_interface = phy_get_interface_by_name(phy_mode); @@ -716,7 +719,6 @@ static int zynq_gem_ofdata_to_platdata(struct udevice *dev) } priv->interface = pdata->phy_interface; - priv->max_speed = dev_read_u32_default(dev, "max-speed", SPEED_1000); priv->int_pcs = dev_read_bool(dev, "is-internal-pcspma"); printf("ZYNQ GEM: %lx, phyaddr %x, interface %s\n", (ulong)priv->iobase, |