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| author | Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> | 2017-01-17 16:27:30 +0100 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2017-02-17 10:22:46 +0100 |
| commit | 781745bd87710c5604a0ae005153d0c9578d616a (patch) | |
| tree | 1f769cbd756322f578ea632b5b6f384d36c4f0a3 /drivers/net/zynq_gem.c | |
| parent | 3a64b2536487fe03d4d21d9cefb45b2c841a9d21 (diff) | |
| download | u-boot-781745bd87710c5604a0ae005153d0c9578d616a.tar.gz | |
zynq: Move zynq to clock framework
Move the zynq to clock framework and remove unused functions as well as
the CONFIG_ZYNQ_PS_CLK_FREQ configuration.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'drivers/net/zynq_gem.c')
| -rw-r--r-- | drivers/net/zynq_gem.c | 9 |
1 files changed, 0 insertions, 9 deletions
diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index 36397fe053..4842a42896 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -181,9 +181,7 @@ struct zynq_gem_priv { struct phy_device *phydev; int phy_of_handle; struct mii_dev *bus; -#if defined(CONFIG_CLK) || defined(CONFIG_SPL_CLK) struct clk clk; -#endif }; static u32 phy_setup_op(struct zynq_gem_priv *priv, u32 phy_addr, u32 regnum, @@ -456,7 +454,6 @@ static int zynq_gem_init(struct udevice *dev) break; } -#if defined(CONFIG_CLK) || defined(CONFIG_SPL_CLK) ret = clk_set_rate(&priv->clk, clk_rate); if (IS_ERR_VALUE(ret) && ret != (unsigned long)-ENOSYS) { dev_err(dev, "failed to set tx clock rate\n"); @@ -468,10 +465,6 @@ static int zynq_gem_init(struct udevice *dev) dev_err(dev, "failed to enable tx clock\n"); return ret; } -#else - zynq_slcr_gem_clk_setup((ulong)priv->iobase != - ZYNQ_GEM_BASEADDR0, clk_rate); -#endif setbits_le32(®s->nwctrl, ZYNQ_GEM_NWCTRL_RXEN_MASK | ZYNQ_GEM_NWCTRL_TXEN_MASK); @@ -644,13 +637,11 @@ static int zynq_gem_probe(struct udevice *dev) priv->tx_bd = (struct emac_bd *)bd_space; priv->rx_bd = (struct emac_bd *)((ulong)bd_space + BD_SEPRN_SPACE); -#if defined(CONFIG_CLK) || defined(CONFIG_SPL_CLK) ret = clk_get_by_name(dev, "tx_clk", &priv->clk); if (ret < 0) { dev_err(dev, "failed to get clock\n"); return -EINVAL; } -#endif priv->bus = mdio_alloc(); priv->bus->read = zynq_gem_miiphy_read; |