diff options
| author | Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com> | 2019-02-27 14:41:02 +0530 |
|---|---|---|
| committer | Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> | 2019-03-15 11:52:00 +0530 |
| commit | 43ad41e6aecdfd4df71698bec8a69caa23c30232 (patch) | |
| tree | e511996ac0708ce47b26f249e6193c01a70c3d61 /drivers/net/fsl-mc | |
| parent | 2e9f1bf5888b0df65a691bd10702f33193e9a666 (diff) | |
| download | u-boot-43ad41e6aecdfd4df71698bec8a69caa23c30232.tar.gz | |
mc : Reduce MC memory size to 128M
ls2088, ls1088 : minimum MC Memory size is 128 MB
lx2 : minimum MC memory size is 256 MB
Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Diffstat (limited to 'drivers/net/fsl-mc')
| -rw-r--r-- | drivers/net/fsl-mc/mc.c | 22 |
1 files changed, 18 insertions, 4 deletions
diff --git a/drivers/net/fsl-mc/mc.c b/drivers/net/fsl-mc/mc.c index e6cf7f3362..cc59b21f9f 100644 --- a/drivers/net/fsl-mc/mc.c +++ b/drivers/net/fsl-mc/mc.c @@ -28,6 +28,7 @@ #define MC_MEM_SIZE_ENV_VAR "mcmemsize" #define MC_BOOT_TIMEOUT_ENV_VAR "mcboottimeout" #define MC_BOOT_ENV_VAR "mcinitcmd" +#define MC_DRAM_BLOCK_DEFAULT_SIZE (512UL * 1024 * 1024) DECLARE_GLOBAL_DATA_PTR; static int mc_memset_resv_ram; @@ -682,7 +683,8 @@ int mc_init(u64 mc_fw_addr, u64 mc_dpc_addr) size_t mc_ram_size = mc_get_dram_block_size(); mc_ram_num_256mb_blocks = mc_ram_size / MC_RAM_SIZE_ALIGNMENT; - if (mc_ram_num_256mb_blocks < 1 || mc_ram_num_256mb_blocks > 0xff) { + + if (mc_ram_num_256mb_blocks >= 0xff) { error = -EINVAL; printf("fsl-mc: ERROR: invalid MC private RAM size (%lu)\n", mc_ram_size); @@ -690,6 +692,12 @@ int mc_init(u64 mc_fw_addr, u64 mc_dpc_addr) } /* + * To support 128 MB DDR Size for MC + */ + if (mc_ram_num_256mb_blocks == 0) + mc_ram_num_256mb_blocks = 0xFF; + + /* * Management Complex cores should be held at reset out of POR. * U-Boot should be the first software to touch MC. To be safe, * we reset all cores again by setting GCR1 to 0. It doesn't do @@ -729,8 +737,14 @@ int mc_init(u64 mc_fw_addr, u64 mc_dpc_addr) /* * Tell MC what is the address range of the DRAM block assigned to it: */ - reg_mcfbalr = (u32)mc_ram_addr | - (mc_ram_num_256mb_blocks - 1); + if (mc_ram_num_256mb_blocks < 0xFF) { + reg_mcfbalr = (u32)mc_ram_addr | + (mc_ram_num_256mb_blocks - 1); + } else { + reg_mcfbalr = (u32)mc_ram_addr | + (mc_ram_num_256mb_blocks); + } + out_le32(&mc_ccsr_regs->reg_mcfbalr, reg_mcfbalr); out_le32(&mc_ccsr_regs->reg_mcfbahr, (u32)(mc_ram_addr >> 32)); @@ -880,7 +894,7 @@ unsigned long mc_get_dram_block_size(void) "\' environment variable: %lu\n", dram_block_size); - dram_block_size = CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE; + dram_block_size = MC_DRAM_BLOCK_DEFAULT_SIZE; } } |