diff options
| author | Simon Glass <sjg@chromium.org> | 2020-01-23 11:48:23 -0700 |
|---|---|---|
| committer | Heiko Schocher <hs@denx.de> | 2020-01-27 07:24:17 +0100 |
| commit | d96440d1e36e080ca1229dab65bc417640b58df5 (patch) | |
| tree | ddf21a7d97f4dd66b541c2fb3f6c3720fd105b5b /drivers/i2c/designware_i2c.c | |
| parent | f3d461521a8ef6540dbcb2314802eae5790a9408 (diff) | |
| download | u-boot-d96440d1e36e080ca1229dab65bc417640b58df5.tar.gz | |
i2c: designware_i2c: Add support for fast-plus speed
Fast-plus runs at 1MHz and is used by some devices. Add support for this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'drivers/i2c/designware_i2c.c')
| -rw-r--r-- | drivers/i2c/designware_i2c.c | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/drivers/i2c/designware_i2c.c b/drivers/i2c/designware_i2c.c index 1f41e3eae0..d9e0d81ff0 100644 --- a/drivers/i2c/designware_i2c.c +++ b/drivers/i2c/designware_i2c.c @@ -116,6 +116,13 @@ static const struct i2c_mode_info info_for_mode[] = { 300, 300, }, + [IC_SPEED_MODE_FAST_PLUS] = { + I2C_SPEED_FAST_PLUS_RATE, + MIN_FP_SCL_HIGHTIME, + MIN_FP_SCL_LOWTIME, + 260, + 500, + }, [IC_SPEED_MODE_HIGH] = { I2C_SPEED_HIGH_RATE, MIN_HS_SCL_HIGHTIME, @@ -230,6 +237,8 @@ static unsigned int __dw_i2c_set_bus_speed(struct dw_i2c *priv, (!scl_sda_cfg || scl_sda_cfg->has_high_speed)) i2c_spd = IC_SPEED_MODE_HIGH; else if (speed >= I2C_SPEED_FAST_RATE) + i2c_spd = IC_SPEED_MODE_FAST_PLUS; + else if (speed >= I2C_SPEED_FAST_PLUS_RATE) i2c_spd = IC_SPEED_MODE_FAST; else i2c_spd = IC_SPEED_MODE_STANDARD; @@ -271,13 +280,12 @@ static unsigned int __dw_i2c_set_bus_speed(struct dw_i2c *priv, writel(config.scl_hcnt, &i2c_base->ic_hs_scl_hcnt); writel(config.scl_lcnt, &i2c_base->ic_hs_scl_lcnt); break; - case IC_SPEED_MODE_STANDARD: cntl |= IC_CON_SPD_SS; writel(config.scl_hcnt, &i2c_base->ic_ss_scl_hcnt); writel(config.scl_lcnt, &i2c_base->ic_ss_scl_lcnt); break; - + case IC_SPEED_MODE_FAST_PLUS: case IC_SPEED_MODE_FAST: default: cntl |= IC_CON_SPD_FS; |