diff options
| author | Ley Foon Tan <ley.foon.tan@intel.com> | 2019-03-22 01:24:00 +0800 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2019-04-17 22:20:17 +0200 |
| commit | b6f7ee5d1f980ffa63e22749e2deae6caa57227e (patch) | |
| tree | be6a1701360ae56a7e85ae9a3d0aac194ac45101 /drivers/ddr | |
| parent | c5de2b7eae68ac27da78c32cdf0845126a0d1a77 (diff) | |
| download | u-boot-b6f7ee5d1f980ffa63e22749e2deae6caa57227e.tar.gz | |
ddr: altera: stratix10: Move SDRAM size check to SDRAM driver
Move SDRAM size check to SDRAM driver. sdram_calculate_size()
is called in SDRAM initialization already, avoid calling
twice in size check function.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Diffstat (limited to 'drivers/ddr')
| -rw-r--r-- | drivers/ddr/altera/sdram_s10.c | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/drivers/ddr/altera/sdram_s10.c b/drivers/ddr/altera/sdram_s10.c index a48567c109..033ccca437 100644 --- a/drivers/ddr/altera/sdram_s10.c +++ b/drivers/ddr/altera/sdram_s10.c @@ -134,6 +134,17 @@ static int poll_hmc_clock_status(void) SYSMGR_HMC_CLK_STATUS_MSK, true, 1000, false); } +static void sdram_size_check(void) +{ + /* Sanity check ensure correct SDRAM size specified */ + debug("DDR: Running SDRAM size sanity check\n"); + if (get_ram_size(0, gd->ram_size) != gd->ram_size) { + puts("DDR: SDRAM size check failed!\n"); + hang(); + } + debug("DDR: SDRAM size check passed!\n"); +} + /** * sdram_mmr_init_full() - Function to initialize SDRAM MMR * @@ -339,6 +350,8 @@ int sdram_mmr_init_full(unsigned int unused) else gd->ram_size = size; + printf("DDR: %lld MiB\n", gd->ram_size >> 20); + /* Enable or disable the SDRAM ECC */ if (CTRLCFG1_CFG_CTRL_EN_ECC(ctrlcfg1)) { setbits_le32(SOCFPGA_SDR_ADDRESS + ECCCTRL1, @@ -361,6 +374,8 @@ int sdram_mmr_init_full(unsigned int unused) DDR_HMC_ECCCTL2_AWB_EN_SET_MSK)); } + sdram_size_check(); + debug("DDR: HMC init success\n"); return 0; } |