diff options
| author | Patrick Delaunay <patrick.delaunay@st.com> | 2018-07-09 15:17:20 +0200 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2018-07-20 15:55:05 -0400 |
| commit | d090cbab64c893e6c6122e468282750aeeeae840 (patch) | |
| tree | e7c763d35e75bcd7b5d82c6fce964924c8c51566 /drivers/clk/clk_stm32mp1.c | |
| parent | a674313c2cebfad8e168a2011027470a2e640983 (diff) | |
| download | u-boot-d090cbab64c893e6c6122e468282750aeeeae840.tar.gz | |
misc: stm32: Add STM32MP1 support
Following next kernel rcc bindings, we must use a MFD
RCC driver which is able to bind both clock and reset
drivers.
We can reuse and adapt RCC MFD driver already available
for MCU SoCs (F4/F7/H7).
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Diffstat (limited to 'drivers/clk/clk_stm32mp1.c')
| -rw-r--r-- | drivers/clk/clk_stm32mp1.c | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/drivers/clk/clk_stm32mp1.c b/drivers/clk/clk_stm32mp1.c index 1a77eba39c..af7d05fb8f 100644 --- a/drivers/clk/clk_stm32mp1.c +++ b/drivers/clk/clk_stm32mp1.c @@ -1764,15 +1764,9 @@ static const struct clk_ops stm32mp1_clk_ops = { .get_rate = stm32mp1_clk_get_rate, }; -static const struct udevice_id stm32mp1_clk_ids[] = { - { .compatible = "st,stm32mp1-rcc-clk" }, - { } -}; - U_BOOT_DRIVER(stm32mp1_clock) = { .name = "stm32mp1_clk", .id = UCLASS_CLK, - .of_match = stm32mp1_clk_ids, .ops = &stm32mp1_clk_ops, .priv_auto_alloc_size = sizeof(struct stm32mp1_clk_priv), .probe = stm32mp1_clk_probe, |