diff options
author | Dinh Nguyen <dinguyen@kernel.org> | 2019-04-23 16:55:03 -0500 |
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committer | Tom Rini <trini@konsulko.com> | 2019-05-05 08:48:50 -0400 |
commit | 84b124db3584d8b3f1a42c1506983323bce9983f (patch) | |
tree | b343ae85d7c2600aca0edd911b4b01c6975ac4ad /drivers/cache/cache-uclass.c | |
parent | 2bac27ce945e8399ea2c1404310ead450c065819 (diff) | |
download | u-boot-84b124db3584d8b3f1a42c1506983323bce9983f.tar.gz |
dm: cache: Create a uclass for cache
The cache UCLASS will be used for configure settings that can be found
in a CPU's L2 cache controller.
Add a uclass and a test for cache.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Diffstat (limited to 'drivers/cache/cache-uclass.c')
-rw-r--r-- | drivers/cache/cache-uclass.c | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/drivers/cache/cache-uclass.c b/drivers/cache/cache-uclass.c new file mode 100644 index 0000000000..97ce0249a4 --- /dev/null +++ b/drivers/cache/cache-uclass.c @@ -0,0 +1,24 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2019 Intel Corporation <www.intel.com> + */ + +#include <common.h> +#include <cache.h> +#include <dm.h> + +int cache_get_info(struct udevice *dev, struct cache_info *info) +{ + struct cache_ops *ops = cache_get_ops(dev); + + if (!ops->get_info) + return -ENOSYS; + + return ops->get_info(dev, info); +} + +UCLASS_DRIVER(cache) = { + .id = UCLASS_CACHE, + .name = "cache", + .post_bind = dm_scan_fdt_dev, +}; |