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| author | Tom Rini <trini@konsulko.com> | 2017-03-17 09:11:12 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2017-03-17 14:15:17 -0400 |
| commit | f9515756b6d76cde99b385dda905dfb20d31ea48 (patch) | |
| tree | b2cd0007fb90a43992cb51f1a02d4e191e3dde10 /doc | |
| parent | e245f1a5db086d676cbd97371046ea5c5e554326 (diff) | |
| parent | 520c174b3564ae183f0e7c118dc8ce3770ae20b0 (diff) | |
| download | u-boot-f9515756b6d76cde99b385dda905dfb20d31ea48.tar.gz | |
Merge git://git.denx.de/u-boot-rockchip
This includes support for rk3188 from Heiko Stübner and and rk3328 from
Kever Yang. Also included is SPL support for rk3399 and a fix for
rk3288 to get it booting again (spl_early_init()).
Diffstat (limited to 'doc')
| -rw-r--r-- | doc/device-tree-bindings/clock/rockchip,rk3399-dmc.txt | 42 | ||||
| -rw-r--r-- | doc/driver-model/README.txt | 4 |
2 files changed, 46 insertions, 0 deletions
diff --git a/doc/device-tree-bindings/clock/rockchip,rk3399-dmc.txt b/doc/device-tree-bindings/clock/rockchip,rk3399-dmc.txt new file mode 100644 index 0000000000..a15dc5d1f8 --- /dev/null +++ b/doc/device-tree-bindings/clock/rockchip,rk3399-dmc.txt @@ -0,0 +1,42 @@ +Rockchip Dynamic Memory Controller Driver +Required properties: +- compatible: "rockchip,rk3399-dmc", "syscon" +- rockchip,cru: this driver should access cru regs, so need get cru here +- rockchip,pmucru: this driver should access pmucru regs, so need get pmucru here +- rockchip,pmugrf: this driver should access pmugrf regs, so need get pmugrf here +- rockchip,pmusgrf: this driver should access pmusgrf regs, so need get pmusgrf here +- rockchip,cic: this driver should access cic regs, so need get cic here +- reg: dynamic ram protocol controller(PCTL) address, PHY Independent(PI) address, phy controller(PHYCTL) address and memory schedule(MSCH) address +- clock: must include clock specifiers corresponding to entries in the clock-names property. + Must contain + dmc_clk: for ddr working frequency +- rockchip,sdram-params: SDRAM parameters, including all the information by ddr driver: + Must contain + Genarate by vendor tool and adjust for U-Boot dtsi. + +Example: + dmc: dmc { + u-boot,dm-pre-reloc; + compatible = "rockchip,rk3399-dmc"; + devfreq-events = <&dfi>; + interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 0>; + clocks = <&cru SCLK_DDRCLK>; + clock-names = "dmc_clk"; + reg = <0x0 0xffa80000 0x0 0x0800 + 0x0 0xffa80800 0x0 0x1800 + 0x0 0xffa82000 0x0 0x2000 + 0x0 0xffa84000 0x0 0x1000 + 0x0 0xffa88000 0x0 0x0800 + 0x0 0xffa88800 0x0 0x1800 + 0x0 0xffa8a000 0x0 0x2000 + 0x0 0xffa8c000 0x0 0x1000>; + }; + + &dmc { + rockchip,sdram-params = < + 0x2 + 0xa + 0x3 + ... + >; + }; diff --git a/doc/driver-model/README.txt b/doc/driver-model/README.txt index fea324e25e..0853477578 100644 --- a/doc/driver-model/README.txt +++ b/doc/driver-model/README.txt @@ -825,6 +825,10 @@ drivers marked with DM_FLAG_PRE_RELOC or the device tree 'u-boot,dm-pre-reloc' flag are initialised prior to relocation. This helps to reduce the driver model overhead. +It is possible to limit this to specific relocation steps, by using +the more specialized 'u-boot,dm-spl' and 'u-boot,dm-tpl' flags +in the devicetree. + Then post relocation we throw that away and re-init driver model again. For drivers which require some sort of continuity between pre- and post-relocation devices, we can provide access to the pre-relocation |