Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86WIP/04Feb2020

- Various minor fixes for x86
- Switch to ACPI mode on Intel edison
- Support run-time configuration for NS16550 driver
- Update coreboot and slimbootloader serial drivers to use NS16550
run-time configuration
- ICH SPI driver fixes to hardware sequencing erase case
- Move ITSS from Apollo Lake to a more generic location
- Intel GPIO driver bug fixes
- Move to vs2017-win2016 platform build host for Azure pipelines

2 files changed, 54 insertions, 71 deletions

diff --git a/doc/board/google/chromebook_coral.rst b/doc/board/google/chromebook_coral.rst
index 515fd06d76..5dc3c97c3d 100644
--- a/doc/board/google/chromebook_coral.rst
+++ b/doc/board/google/chromebook_coral.rst
@@ -112,7 +112,7 @@ U-Boot then shuts down CAR and jumps to its relocated version.
 
 
 Boot flow - U-Boot post-relocation
----------------------------------
+----------------------------------
 
 U-Boot starts up normally, running near the top of RAM. After driver model is
 running, arch_fsp_init_r() is called which loads and runs the FSP-S binary.
@@ -142,54 +142,56 @@ Performance
 -----------
 
 Bootstage is used through all phases of U-Boot to keep accurate timimgs for
-boot. Use 'bootstage report' in U-Boot to see the report, e.g.:
-
-Timer summary in microseconds (16 records):
-       Mark    Elapsed  Stage
-          0          0  reset
-    155,325    155,325  TPL
-    204,014     48,689  end TPL
-    204,385        371  SPL
-    738,633    534,248  end SPL
-    739,161        528  board_init_f
-    842,764    103,603  board_init_r
-  1,166,233    323,469  main_loop
-  1,166,283         50  id=175
-
-Accumulated time:
-                    62  fast_spi
-                   202  dm_r
-                 7,779  dm_spl
-                15,555  dm_f
-               208,357  fsp-m
-               239,847  fsp-s
-               292,143  mmap_spi
-
-CPU performance is about 3500 DMIPS:
-
-=> dhry
-1000000 iterations in 161 ms: 6211180/s, 3535 DMIPS
+boot. Use 'bootstage report' in U-Boot to see the report, e.g.::
+
+    Timer summary in microseconds (16 records):
+           Mark    Elapsed  Stage
+              0          0  reset
+        155,325    155,325  TPL
+        204,014     48,689  end TPL
+        204,385        371  SPL
+        738,633    534,248  end SPL
+        739,161        528  board_init_f
+        842,764    103,603  board_init_r
+      1,166,233    323,469  main_loop
+      1,166,283         50  id=175
+
+    Accumulated time:
+                        62  fast_spi
+                       202  dm_r
+                     7,779  dm_spl
+                    15,555  dm_f
+                   208,357  fsp-m
+                   239,847  fsp-s
+                   292,143  mmap_spi
+
+CPU performance is about 3500 DMIPS::
+
+    => dhry
+    1000000 iterations in 161 ms: 6211180/s, 3535 DMIPS
 
 
 Partial memory map
 ------------------
 
-ffffffff	Top of ROM (and last byte of 32-bit address space)
-ffff8000	TPL loaded here (from IFWI)
-ff000000	Bottom of ROM
-fefc000		 Top of CAR region
-fef96000	Stack for FSP-M
-fef40000 59000	FSP-M
-fef11000	SPL loaded here
-fef10000	CONFIG_BLOBLIST_ADDR
-fef10000	Stack top in TPL, SPL and U-Boot before relocation
-fef00000  1000	CONFIG_BOOTSTAGE_STASH_ADDR
-fef00000	Base of CAR region
-
-   f0000	CONFIG_ROM_TABLE_ADDR
-  120000	BSS (defined in u-boot-spl.lds)
-  200000	FSP-S (which is run after U-Boot is relocated)
- 1110000	CONFIG_SYS_TEXT_BASE
+::
+
+    ffffffff       Top of ROM (and last byte of 32-bit address space)
+    ffff8000       TPL loaded here (from IFWI)
+    ff000000       Bottom of ROM
+     fefc000       Top of CAR region
+    fef96000       Stack for FSP-M
+    fef40000 59000 FSP-M
+    fef11000       SPL loaded here
+    fef10000       CONFIG_BLOBLIST_ADDR
+    fef10000       Stack top in TPL, SPL and U-Boot before relocation
+    fef00000  1000 CONFIG_BOOTSTAGE_STASH_ADDR
+    fef00000       Base of CAR region
+
+       f0000       CONFIG_ROM_TABLE_ADDR
+      120000       BSS (defined in u-boot-spl.lds)
+      200000       FSP-S (which is run after U-Boot is relocated)
+     1110000       CONFIG_SYS_TEXT_BASE
 
 
 Supported peripherals
diff --git a/doc/board/intel/slimbootloader.rst b/doc/board/intel/slimbootloader.rst
index 375e676804..a8c41b1aa7 100644
--- a/doc/board/intel/slimbootloader.rst
+++ b/doc/board/intel/slimbootloader.rst
@@ -111,35 +111,16 @@ Download it from http://downloads.yoctoproject.org/releases/yocto/yocto-2.0/mach
 Build Instruction for Slim Bootloader for LeafHill (APL) target
 ---------------------------------------------------------------
 
-LeafHill is using PCI UART2 device as a serial port.
-For MEM32 serial port, CONFIG_SYS_NS16550_MEM32 needs to be enabled in U-Boot.
+Prepare U-Boot and Slim Bootloader as described at the beginning of this page.
+Also, the PayloadId needs to be set for APL board.
 
-1. Enable CONFIG_SYS_NS16550_MEM32 in U-Boot::
-
-    $ vi include/configs/slimbootloader.h
-    +#define CONFIG_SYS_NS16550_MEM32
-     #ifdef CONFIG_SYS_NS16550_MEM3
-
-2. Build U-Boot::
-
-   $ make disclean
-   $ make slimbootloader_defconfig
-   $ make all
-
-3. Copy u-boot-dtb.bin to Slim Bootloader.
-   Slim Bootloader looks for a payload from the specific location.
-   Copy the build u-boot-dtb.bin to the expected location::
-
-   $ mkdir -p <Slim Bootloader Dir>/PayloadPkg/PayloadBins/
-   $ cp <U-Boot Dir>/u-boot-dtb.bin <Slim Bootloader Dir>/PayloadPkg/PayloadBins/u-boot-dtb.bin
-
-4. Update PayloadId. Let's use 'U-BT' as an example::
+1. Update PayloadId. Let's use 'U-BT' as an example::
 
     $ vi Platform/ApollolakeBoardPkg/CfgData/CfgData_Int_LeafHill.dlt
     -GEN_CFG_DATA.PayloadId                     | 'AUTO
     +GEN_CFG_DATA.PayloadId                     | 'U-BT'
 
-5. Update payload text base.
+2. Update payload text base.
 
 * PAYLOAD_EXE_BASE must be the same as U-Boot CONFIG_SYS_TEXT_BASE
   in board/intel/slimbootloader/Kconfig.
@@ -149,18 +130,18 @@ For MEM32 serial port, CONFIG_SYS_NS16550_MEM32 needs to be enabled in U-Boot.
     +               self.PAYLOAD_LOAD_HIGH    = 0
     +               self.PAYLOAD_EXE_BASE     = 0x00100000
 
-6. Build APL target. Make sure u-boot-dtb.bin and U-BT PayloadId
+3. Build APL target. Make sure u-boot-dtb.bin and U-BT PayloadId
    in build command. The output is Outputs/apl/Stitch_Components.zip::
 
    $ python BuildLoader.py build apl -p "OsLoader.efi:LLDR:Lz4;u-boot-dtb.bin:U-BT:Lzma"
 
-7. Stitch IFWI.
+4. Stitch IFWI.
 
    Refer to Apollolake_ page in Slim Bootloader document site::
 
    $ python Platform/ApollolakeBoardPkg/Script/StitchLoader.py -i <Existing IFWI> -s Outputs/apl/Stitch_Components.zip -o <Output IFWI>
 
-8. Flash IFWI.
+5. Flash IFWI.
 
    Use DediProg to flash IFWI. You should reach at U-Boot serial console.
 
@@ -175,7 +156,7 @@ Build Instruction to use ELF U-Boot
 
 2. Build U-Boot::
 
-   $ make disclean
+   $ make distclean
    $ make slimbootloader_defconfig
    $ make all
    $ strip u-boot (removing symbol for reduced size)