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author | Wills Wang <wills.wang@live.com> | 2016-03-16 16:59:57 +0800 |
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committer | Daniel Schwierzeck <daniel.schwierzeck@gmail.com> | 2016-05-21 01:25:50 +0200 |
commit | 60b49761e9d2f0d16ac5cef934504bc895ac3913 (patch) | |
tree | d98736ed70ab30b9153f79be3c60022192cb8deb /doc | |
parent | c102453aebe92530962de41539ce4f198d27b9c7 (diff) | |
download | u-boot-60b49761e9d2f0d16ac5cef934504bc895ac3913.tar.gz |
drivers: serial: add serial driver for ar933x SOC
This patch add support for ar933x serial.
Signed-off-by: Wills Wang <wills.wang@live.com>
Reviewed-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'doc')
-rw-r--r-- | doc/device-tree-bindings/serial/qca,ar9330-uart.txt | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/doc/device-tree-bindings/serial/qca,ar9330-uart.txt b/doc/device-tree-bindings/serial/qca,ar9330-uart.txt new file mode 100644 index 0000000000..ec576a1ce9 --- /dev/null +++ b/doc/device-tree-bindings/serial/qca,ar9330-uart.txt @@ -0,0 +1,24 @@ +* Qualcomm Atheros AR9330 High-Speed UART + +Required properties: + +- compatible: Must be "qca,ar9330-uart" + +- reg: Specifies the physical base address of the controller and + the length of the memory mapped region. + +Additional requirements: + + Each UART port must have an alias correctly numbered in "aliases" + node. + +Example: + + aliases { + serial0 = &uart0; + }; + + uart0: uart@18020000 { + compatible = "qca,ar9330-uart"; + reg = <0x18020000 0x14>; + }; |