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authorTom Rini <trini@konsulko.com>2020-04-07 11:58:44 -0400
committerTom Rini <trini@konsulko.com>2020-04-07 17:13:35 -0400
commit1f47e2aca42c2e51ff3a7754c717ee13f568c721 (patch)
treeeca6cb5e551dbb75c2328b1dba3e7a2b8a77d327 /doc
parent2b18b89156335bf1f0d84f81d3597762bc48c61d (diff)
parent895a7866c20cf6c01779b5a60fbf2770b88930a4 (diff)
downloadu-boot-1f47e2aca42c2e51ff3a7754c717ee13f568c721.tar.gz
Merge tag 'xilinx-for-v2020.07' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into nextWIP/07Apr2020-next
Xilinx changes for v2020.07 common: - Align ENV_FAT_INTERFACE - Fix MAC address source print log - Improve based autodetection code xilinx: - Enable netconsole Microblaze: - Setup default ENV_OFFSET/ENV_SECT_SIZE Zynq: - Multiple DT updates/fixes - Use DEVICE_TREE environment variable for DTB selection - Switch to single zynq configuration - Enable NOR flash via DM - Minor SPL print removal - Enable i2c mux driver ZynqMP: - Print multiboot register - Enable cache commands in mini mtest - Multiple DT updates/fixes - Fix firmware probing when driver is not enabled - Specify 3rd backup RAM boot mode in SPL - Add SPL support for zcu102 v1.1 and zcu111 revA - Redesign debug uart enabling and psu_init delay - Enable full u-boot run from EL3 - Enable u-boot.itb generation without ATF with U-Boot in EL3 Versal: - Enable distro default - Enable others SPI flashes - Enable systems without DDR Drivers: - Gem: - Flush memory after freeing - Handle mdio bus separately - Watchdog: - Get rid of unused global data pointer - Enable window watchdog timer - Serial: - Change reinitialization logic in zynq serial driver Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'doc')
-rw-r--r--doc/board/toradex/verdin-imx8mm.rst26
-rw-r--r--doc/board/xilinx/zynq.rst3
-rw-r--r--doc/device-tree-bindings/gpio/fsl,mpc83xx-spisel-boot.txt22
3 files changed, 30 insertions, 21 deletions
diff --git a/doc/board/toradex/verdin-imx8mm.rst b/doc/board/toradex/verdin-imx8mm.rst
index b2ae4fabea..b9f7dc39c9 100644
--- a/doc/board/toradex/verdin-imx8mm.rst
+++ b/doc/board/toradex/verdin-imx8mm.rst
@@ -18,31 +18,22 @@ Get and Build the ARM Trusted Firmware (Trusted Firmware A)
.. code-block:: bash
$ echo "Downloading and building TF-A..."
- $ git clone -b imx_4.14.98_2.3.0 \
- https://source.codeaurora.org/external/imx/imx-atf
- $ cd imx-atf
-
-Please edit ``plat/imx/imx8mm/include/platform_def.h`` so it contains proper
-values for UART configuration and BL31 base address (correct values listed
-below):
-
-.. code-block:: bash
-
- #define BL31_BASE 0x910000
- #define IMX_BOOT_UART_BASE 0x30860000
- #define DEBUG_CONSOLE 1
+ $ git clone https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git
+ $ cd trusted-firmware-a
Then build ATF (TF-A):
.. code-block:: bash
- $ make PLAT=imx8mm bl31
+ $ make PLAT=imx8mm IMX_BOOT_UART_BASE=0x30860000 bl31
+ $ cp build/imx8mm/release/bl31.bin ../
Get the DDR Firmware
--------------------
.. code-block:: bash
+ $ cd ..
$ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.4.1.bin
$ chmod +x firmware-imx-8.4.1.bin
$ ./firmware-imx-8.4.1.bin
@@ -53,6 +44,7 @@ Build U-Boot
.. code-block:: bash
$ export CROSS_COMPILE=aarch64-linux-gnu-
+ $ export ATF_LOAD_ADDR=0x920000
$ make verdin-imx8mm_defconfig
$ make flash.bin
@@ -89,12 +81,6 @@ Output:
U-Boot SPL 2020.01-00187-gd411d164e5 (Jan 26 2020 - 04:47:26 +0100)
Normal Boot
Trying to boot from MMC1
- NOTICE: Configuring TZASC380
- NOTICE: RDC off
- NOTICE: BL31: v2.0(release):rel_imx_4.14.98_2.3.0-0-g09c5cc994-dirty
- NOTICE: BL31: Built : 01:11:41, Jan 25 2020
- NOTICE: sip svc init
-
U-Boot 2020.01-00187-gd411d164e5 (Jan 26 2020 - 04:47:26 +0100)
diff --git a/doc/board/xilinx/zynq.rst b/doc/board/xilinx/zynq.rst
index 3f0513ed36..6a09df1d15 100644
--- a/doc/board/xilinx/zynq.rst
+++ b/doc/board/xilinx/zynq.rst
@@ -32,7 +32,8 @@ Building
configure and build for zc702 board::
- $ make zynq_zc702_config
+ $ export DEVICE_TREE=zynq-zc702
+ $ make xilinx_zynq_virt_defconfig
$ make
Bootmode
diff --git a/doc/device-tree-bindings/gpio/fsl,mpc83xx-spisel-boot.txt b/doc/device-tree-bindings/gpio/fsl,mpc83xx-spisel-boot.txt
new file mode 100644
index 0000000000..52d8bb0a5c
--- /dev/null
+++ b/doc/device-tree-bindings/gpio/fsl,mpc83xx-spisel-boot.txt
@@ -0,0 +1,22 @@
+MPC83xx SPISEL_BOOT gpio controller
+
+Provide access to MPC83xx SPISEL_BOOT signal as a gpio to allow it to be
+easily bound as a SPI controller chip select.
+
+The SPISEL_BOOT signal is always an output.
+
+Required properties:
+
+- compatible: must be "fsl,mpc83xx-spisel-boot" or "fsl,mpc8309-spisel-boot".
+- reg: must point to the SPI_CS register in the SoC register map.
+- ngpios: number of gpios provided by driver, normally 1.
+
+Example:
+
+ spisel_boot: spisel_boot@14c {
+ compatible = "fsl,mpc8309-spisel-boot";
+ reg = <0x14c 0x04>;
+ #gpio-cells = <2>;
+ device_type = "gpio";
+ ngpios = <1>;
+ };