diff options
author | Breno Matheus Lima <breno.lima@nxp.com> | 2019-06-05 18:18:30 +0000 |
---|---|---|
committer | Tom Rini <trini@konsulko.com> | 2019-06-20 10:57:08 -0400 |
commit | 656d8da9d2862afd293ae678d37a486d34b76ca2 (patch) | |
tree | 405420ece9ddde3c6e8f66ab65867d128d7761be /doc/device-tree-bindings/misc | |
parent | 894e235f145b4f397a474f22c7c604ae925eb114 (diff) | |
download | u-boot-656d8da9d2862afd293ae678d37a486d34b76ca2.tar.gz |
doc: Remove duplicated documentation directory
Commit ad7061ed742e ("doc: Move device tree bindings documentation to
doc/device-tree-bindings") moved all device tree binding documentation
to doc/device-tree-bindings directory.
The current U-Boot project still have two documentation directories:
- doc/
- Documentation/
Move all documentation and sphinx files to doc directory so all content
can be in a common place.
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Diffstat (limited to 'doc/device-tree-bindings/misc')
5 files changed, 98 insertions, 0 deletions
diff --git a/doc/device-tree-bindings/misc/misc/fsl,mpc83xx-serdes.txt b/doc/device-tree-bindings/misc/misc/fsl,mpc83xx-serdes.txt new file mode 100644 index 0000000000..64a9b5b154 --- /dev/null +++ b/doc/device-tree-bindings/misc/misc/fsl,mpc83xx-serdes.txt @@ -0,0 +1,24 @@ +MPC83xx SerDes controller devices + +MPC83xx SoCs contain a built-in SerDes controller that determines which +protocols (SATA, PCI Express, SGMII, ...) are used on the system's serdes lines +and how the lines are configured. + +Required properties: +- compatible: must be "fsl,mpc83xx-serdes" +- reg: must point to the serdes controller's register map +- proto: selects for which protocol the serdes lines are configured. One of + "sata", "pex", "pex-x2", "sgmii" +- serdes-clk: determines the frequency the serdes lines are configured for. One + of 100, 125, 150. +- vdd: determines whether 1.0V core VDD is used or not + +Example: + +SERDES: serdes@e3000 { + reg = <0xe3000 0x200>; + compatible = "fsl,mpc83xx-serdes"; + proto = "pex"; + serdes-clk = <100>; + vdd; +}; diff --git a/doc/device-tree-bindings/misc/misc/gdsys,io-endpoint.txt b/doc/device-tree-bindings/misc/misc/gdsys,io-endpoint.txt new file mode 100644 index 0000000000..db2ff8ca12 --- /dev/null +++ b/doc/device-tree-bindings/misc/misc/gdsys,io-endpoint.txt @@ -0,0 +1,20 @@ +gdsys IO endpoint of IHS FPGA devices + +The IO endpoint of IHS FPGA devices is a packet-based transmission interface +that allows interconnected gdsys devices to send and receive data over the +FPGA's main ethernet connection. + +Required properties: +- compatible: must be "gdsys,io-endpoint" +- reg: describes the address and length of the endpoint's register map (within + the FPGA's register space) + +Example: + +fpga0_ep0 { + compatible = "gdsys,io-endpoint"; + reg = <0x020 0x10 + 0x320 0x10 + 0x340 0x10 + 0x360 0x10>; +}; diff --git a/doc/device-tree-bindings/misc/misc/gdsys,iocon_fpga.txt b/doc/device-tree-bindings/misc/misc/gdsys,iocon_fpga.txt new file mode 100644 index 0000000000..acd466fdc6 --- /dev/null +++ b/doc/device-tree-bindings/misc/misc/gdsys,iocon_fpga.txt @@ -0,0 +1,19 @@ +gdsys IHS FPGA for CON devices + +The gdsys IHS FPGA is the main FPGA on gdsys CON devices. This driver provides +support for enabling and starting the FPGA, as well as verifying working bus +communication. + +Required properties: +- compatible: must be "gdsys,iocon_fpga" +- reset-gpios: List of GPIOs controlling the FPGA's reset +- done-gpios: List of GPIOs notifying whether the FPGA's reconfiguration is + done + +Example: + +FPGA0 { + compatible = "gdsys,iocon_fpga"; + reset-gpios = <&PPCPCA 26 0>; + done-gpios = <&GPIO_VB0 19 0>; +}; diff --git a/doc/device-tree-bindings/misc/misc/gdsys,iocpu_fpga.txt b/doc/device-tree-bindings/misc/misc/gdsys,iocpu_fpga.txt new file mode 100644 index 0000000000..819db22bf7 --- /dev/null +++ b/doc/device-tree-bindings/misc/misc/gdsys,iocpu_fpga.txt @@ -0,0 +1,19 @@ +gdsys IHS FPGA for CPU devices + +The gdsys IHS FPGA is the main FPGA on gdsys CPU devices. This driver provides +support for enabling and starting the FPGA, as well as verifying working bus +communication. + +Required properties: +- compatible: must be "gdsys,iocpu_fpga" +- reset-gpios: List of GPIOs controlling the FPGA's reset +- done-gpios: List of GPIOs notifying whether the FPGA's reconfiguration is + done + +Example: + +FPGA0 { + compatible = "gdsys,iocpu_fpga"; + reset-gpios = <&PPCPCA 26 0>; + done-gpios = <&GPIO_VB0 19 0>; +}; diff --git a/doc/device-tree-bindings/misc/misc/gdsys,soc.txt b/doc/device-tree-bindings/misc/misc/gdsys,soc.txt new file mode 100644 index 0000000000..278e935b16 --- /dev/null +++ b/doc/device-tree-bindings/misc/misc/gdsys,soc.txt @@ -0,0 +1,16 @@ +gdsys soc bus driver + +This driver provides a simple interface for the busses associated with gdsys +IHS FPGAs. The bus itself contains devices whose register maps are contained +within the FPGA's register space. + +Required properties: +- fpga: A phandle to the controlling IHS FPGA + +Example: + +FPGA0BUS: fpga0bus { + compatible = "gdsys,soc"; + ranges = <0x0 0xe0600000 0x00004000>; + fpga = <&FPGA0>; +}; |