Merge tag 'xilinx-for-v2020.07' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into nextWIP/07Apr2020-next

Xilinx changes for v2020.07

common:
- Align ENV_FAT_INTERFACE
- Fix MAC address source print log
- Improve based autodetection code

xilinx:
- Enable netconsole

Microblaze:
- Setup default ENV_OFFSET/ENV_SECT_SIZE

Zynq:
- Multiple DT updates/fixes
- Use DEVICE_TREE environment variable for DTB selection
- Switch to single zynq configuration
- Enable NOR flash via DM
- Minor SPL print removal
- Enable i2c mux driver

ZynqMP:
- Print multiboot register
- Enable cache commands in mini mtest
- Multiple DT updates/fixes
- Fix firmware probing when driver is not enabled
- Specify 3rd backup RAM boot mode in SPL
- Add SPL support for zcu102 v1.1 and zcu111 revA
- Redesign debug uart enabling and psu_init delay
- Enable full u-boot run from EL3
- Enable u-boot.itb generation without ATF with U-Boot in EL3

Versal:
- Enable distro default
- Enable others SPI flashes
- Enable systems without DDR

Drivers:
- Gem:
  - Flush memory after freeing
  - Handle mdio bus separately
- Watchdog:
  - Get rid of unused global data pointer
  - Enable window watchdog timer
- Serial:
  - Change reinitialization logic in zynq serial driver

Signed-off-by: Tom Rini <trini@konsulko.com>

1 files changed, 0 insertions, 66 deletions

diff --git a/configs/zynq_zybo_z7_defconfig b/configs/zynq_zybo_z7_defconfig
deleted file mode 100644
index 1dee757062..0000000000
--- a/configs/zynq_zybo_z7_defconfig
+++ /dev/null
@@ -1,66 +0,0 @@
-CONFIG_ARM=y
-CONFIG_SPL_SYS_DCACHE_OFF=y
-CONFIG_ARCH_ZYNQ=y
-CONFIG_SYS_TEXT_BASE=0x4000000
-CONFIG_DM_GPIO=y
-CONFIG_SPL_STACK_R_ADDR=0x200000
-CONFIG_SPL=y
-CONFIG_DEBUG_UART_BASE=0xe0001000
-CONFIG_DEBUG_UART_CLOCK=100000000
-CONFIG_DEBUG_UART=y
-CONFIG_DISTRO_DEFAULTS=y
-CONFIG_SYS_CUSTOM_LDSCRIPT=y
-CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds"
-CONFIG_FIT=y
-CONFIG_FIT_SIGNATURE=y
-CONFIG_FIT_VERBOSE=y
-CONFIG_LEGACY_IMAGE_FORMAT=y
-CONFIG_USE_PREBOOT=y
-CONFIG_SPL_STACK_R=y
-CONFIG_SPL_OS_BOOT=y
-CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000
-# CONFIG_BOOTM_NETBSD is not set
-CONFIG_CMD_THOR_DOWNLOAD=y
-CONFIG_CMD_DFU=y
-CONFIG_CMD_FPGA_LOADBP=y
-CONFIG_CMD_FPGA_LOADFS=y
-CONFIG_CMD_FPGA_LOADMK=y
-CONFIG_CMD_FPGA_LOADP=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_USB=y
-# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_TFTPPUT=y
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_DEFAULT_DEVICE_TREE="zynq-zybo-z7"
-CONFIG_ENV_IS_IN_SPI_FLASH=y
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_NET_RANDOM_ETHADDR=y
-CONFIG_SPL_DM_SEQ_ALIAS=y
-CONFIG_DFU_MMC=y
-CONFIG_DFU_RAM=y
-CONFIG_FPGA_XILINX=y
-CONFIG_FPGA_ZYNQPL=y
-CONFIG_MMC_SDHCI=y
-CONFIG_MMC_SDHCI_ZYNQ=y
-CONFIG_SF_DEFAULT_SPEED=30000000
-CONFIG_SPI_FLASH_SPANSION=y
-CONFIG_PHY_REALTEK=y
-CONFIG_MII=y
-CONFIG_ZYNQ_GEM=y
-CONFIG_DEBUG_UART_ZYNQ=y
-CONFIG_ZYNQ_SERIAL=y
-CONFIG_ZYNQ_QSPI=y
-CONFIG_USB=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_ULPI_VIEWPORT=y
-CONFIG_USB_ULPI=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_MANUFACTURER="Xilinx"
-CONFIG_USB_GADGET_VENDOR_NUM=0x03fd
-CONFIG_USB_GADGET_PRODUCT_NUM=0x0300
-CONFIG_CI_UDC=y
-CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_USB_FUNCTION_THOR=y