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| author | Michal Simek <michal.simek@xilinx.com> | 2020-02-13 14:59:40 +0100 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2020-02-28 12:15:11 +0100 |
| commit | c5d7d58b2c854110ac45193d7adcfd6a1f853138 (patch) | |
| tree | 093dfa117a2b9d0edc225e85c643475d9c2525a3 /configs/xilinx_zynq_virt_defconfig | |
| parent | 9c18aaa23c4a052000133979c268ae703966d0c8 (diff) | |
| download | u-boot-c5d7d58b2c854110ac45193d7adcfd6a1f853138.tar.gz | |
ARM: zynq: Rename defconfig to be align with ZynqMP and Versal
Just cosmetic change before real switch.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'configs/xilinx_zynq_virt_defconfig')
| -rw-r--r-- | configs/xilinx_zynq_virt_defconfig | 78 |
1 files changed, 78 insertions, 0 deletions
diff --git a/configs/xilinx_zynq_virt_defconfig b/configs/xilinx_zynq_virt_defconfig new file mode 100644 index 0000000000..ece619f239 --- /dev/null +++ b/configs/xilinx_zynq_virt_defconfig @@ -0,0 +1,78 @@ +CONFIG_ARM=y +CONFIG_SPL_SYS_DCACHE_OFF=y +CONFIG_ARCH_ZYNQ=y +CONFIG_SYS_TEXT_BASE=0x4000000 +CONFIG_DM_GPIO=y +CONFIG_SPL_STACK_R_ADDR=0x200000 +CONFIG_SPL=y +CONFIG_DISTRO_DEFAULTS=y +CONFIG_SYS_CUSTOM_LDSCRIPT=y +CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds" +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_VERBOSE=y +CONFIG_LEGACY_IMAGE_FORMAT=y +CONFIG_USE_PREBOOT=y +CONFIG_SPL_STACK_R=y +CONFIG_SPL_OS_BOOT=y +CONFIG_SPL_SPI_LOAD=y +CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000 +# CONFIG_BOOTM_NETBSD is not set +CONFIG_CMD_THOR_DOWNLOAD=y +CONFIG_CMD_MEMTEST=y +CONFIG_CMD_DFU=y +CONFIG_CMD_FPGA_LOADBP=y +CONFIG_CMD_FPGA_LOADFS=y +CONFIG_CMD_FPGA_LOADMK=y +CONFIG_CMD_FPGA_LOADP=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_TFTPPUT=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_OF_BOARD=y +CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_DFU_MMC=y +CONFIG_DFU_RAM=y +CONFIG_FPGA_XILINX=y +CONFIG_FPGA_ZYNQPL=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_CADENCE=y +CONFIG_LED=y +CONFIG_LED_GPIO=y +CONFIG_MISC=y +CONFIG_I2C_EEPROM=y +CONFIG_SYS_I2C_EEPROM_ADDR=0x0 +CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW=0x0 +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_ZYNQ=y +CONFIG_SF_DEFAULT_SPEED=30000000 +CONFIG_SPI_FLASH_ISSI=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_PHY_MARVELL=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_XILINX=y +CONFIG_MII=y +CONFIG_ZYNQ_GEM=y +CONFIG_ZYNQ_SERIAL=y +CONFIG_ZYNQ_QSPI=y +CONFIG_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_ULPI_VIEWPORT=y +CONFIG_USB_ULPI=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Xilinx" +CONFIG_USB_GADGET_VENDOR_NUM=0x03fd +CONFIG_USB_GADGET_PRODUCT_NUM=0x0300 +CONFIG_CI_UDC=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_USB_FUNCTION_THOR=y |